54 outputFile_ = conf.
getParameter<std::string>(
"outputFile");
72 dbe->setCurrentFolder(
"SiStrip/BaselineValidator");
75 h1NumbadAPVsRes_ = dbe->book1D(
"ResAPVs",
";#ResAPVs", 100, 1.0, 10001);
76 dbe->tag(h1NumbadAPVsRes_->getFullname(),1);
78 h1ADC_vs_strip_ = dbe->book2D(
"ADCvsAPVs",
";ADCvsAPVs", 768,-0.5,767.5, 1023, -0.5, 1022.5);
79 dbe->tag(h1ADC_vs_strip_->getFullname(),2);
102 e.
getByLabel(srcProcessedRawDigi_,moduleRawDigi);
108 for (; itRawDigis != moduleRawDigi->end(); ++itRawDigis) {
112 int strip =0, totADC=0;
114 for(;itRaw != itRawDigis->
end(); ++itRaw, ++
strip){
116 float adc = itRaw->adc();
117 h1ADC_vs_strip_->Fill(strip,adc);
139 h1NumbadAPVsRes_->Fill(NumResAPVs);
151 if (!outputFile_.empty() && createOutputFile_) {
152 dbe->save(outputFile_);
int adc(sample_type sample)
get the ADC sample (12 bits)
T getParameter(std::string const &) const
T getUntrackedParameter(std::string const &, T const &) const
#define DEFINE_FWK_MODULE(type)
virtual void endJob()
analyzer loop
SiStripBaselineValidator(const edm::ParameterSet &)
virtual void analyze(const edm::Event &, const edm::EventSetup &)
bool getByLabel(InputTag const &tag, Handle< PROD > &result) const
iterator end()
Return the off-the-end iterator.
virtual ~SiStripBaselineValidator()
iterator begin()
Return an iterator to the first DetSet.
collection_type::const_iterator const_iterator
collection_type::const_iterator const_iterator