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/data/refman/pasoursint/CMSSW_5_3_3/src/DQM/L1TMonitor/src/L1GtHwValidation.cc

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00001 
00018 // this class header
00019 #include "DQM/L1TMonitor/interface/L1GtHwValidation.h"
00020 
00021 // system include files
00022 #include <memory>
00023 #include <iostream>
00024 #include <iomanip>
00025 
00026 // user include files
00027 #include "DataFormats/L1GlobalTrigger/interface/L1GlobalTriggerReadoutSetup.h"
00028 #include "DataFormats/L1GlobalTrigger/interface/L1GlobalTriggerReadoutRecord.h"
00029 #include "DataFormats/L1GlobalTrigger/interface/L1GlobalTriggerEvmReadoutRecord.h"
00030 
00031 #include "FWCore/MessageLogger/interface/MessageLogger.h"
00032 #include "FWCore/ServiceRegistry/interface/Service.h"
00033 
00034 #include "FWCore/Framework/interface/EventSetup.h"
00035 #include "FWCore/Framework/interface/ESHandle.h"
00036 #include "FWCore/Framework/interface/Run.h"
00037 
00038 #include "CondFormats/L1TObjects/interface/L1GtTriggerMenu.h"
00039 #include "CondFormats/DataRecord/interface/L1GtTriggerMenuRcd.h"
00040 
00041 #include "CondFormats/L1TObjects/interface/L1GtPrescaleFactors.h"
00042 #include "CondFormats/DataRecord/interface/L1GtPrescaleFactorsAlgoTrigRcd.h"
00043 #include "CondFormats/DataRecord/interface/L1GtPrescaleFactorsTechTrigRcd.h"
00044 
00045 #include "CondFormats/L1TObjects/interface/L1GtTriggerMask.h"
00046 #include "CondFormats/DataRecord/interface/L1GtTriggerMaskAlgoTrigRcd.h"
00047 #include "CondFormats/DataRecord/interface/L1GtTriggerMaskTechTrigRcd.h"
00048 
00049 #include "TH1.h"
00050 #include "TH2.h"
00051 #include "TTree.h"
00052 
00053 // constructor(s)
00054 L1GtHwValidation::L1GtHwValidation(const edm::ParameterSet& paramSet) :
00055             //
00056             // input tag for the L1 GT hardware DAQ record
00057             m_l1GtDataDaqInputTag(paramSet.getParameter<edm::InputTag>(
00058                     "L1GtDataDaqInputTag")),
00059             // input tag for the L1 GT hardware EVM record
00060             m_l1GtDataEvmInputTag(paramSet.getParameter<edm::InputTag>(
00061                     "L1GtDataEvmInputTag")),
00062             // input tag for the L1 GT emulator DAQ record
00063             m_l1GtEmulDaqInputTag(paramSet.getParameter<edm::InputTag>(
00064                     "L1GtEmulDaqInputTag")),
00065             // input tag for the L1 GT emulator EVM record
00066             m_l1GtEmulEvmInputTag(paramSet.getParameter<edm::InputTag>(
00067                     "L1GtEmulEvmInputTag")),
00068             // input tag for the L1 GCT hardware record
00069             m_l1GctDataInputTag(paramSet.getParameter<edm::InputTag>(
00070                     "L1GctDataInputTag")),
00071             //
00072             m_dirName(paramSet.getUntrackedParameter("DirName", std::string(
00073                     "L1TEMU/GTexpert"))),
00074             //
00075             m_excludeCondCategTypeObject(paramSet.getParameter<std::vector<edm::ParameterSet> >(
00076                     "ExcludeCondCategTypeObject")),
00077             //
00078             m_excludeAlgoTrigByName(paramSet.getParameter<std::vector<std::string> >(
00079                     "ExcludeAlgoTrigByName")),
00080             //
00081             m_excludeAlgoTrigByBit(paramSet.getParameter<std::vector<int> >(
00082                     "ExcludeAlgoTrigByBit")),
00083             //
00084             // initialize counters
00085             m_nrDataEventError(0),
00086             m_nrEmulEventError(0),
00087             // cache
00088             m_l1GtMenuCacheID(0ULL), m_l1GtPfAlgoCacheID(0ULL),
00089             m_l1GtPfTechCacheID(0ULL), m_l1GtTmAlgoCacheID(0ULL),
00090             m_l1GtTmTechCacheID(0ULL),
00091             //
00092             m_dbe(0),
00093             m_agree(true),
00094             m_dataOnly(false),
00095             m_emulOnly(false),
00096             m_dataOnlyMask(false),
00097             m_emulOnlyMask(false),
00098             //
00099             m_nrEvJob(0), m_nrEvRun(0) {
00100 
00101 
00102     for (std::vector<edm::ParameterSet>::const_iterator
00103             itExclud  = m_excludeCondCategTypeObject.begin();
00104             itExclud != m_excludeCondCategTypeObject.end();
00105             ++itExclud) {
00106 
00107         if (!(itExclud->getParameter<std::string> ("ExcludedCondCategory")).empty()) {
00108 
00109             m_excludedCondCategory.push_back(l1GtConditionCategoryStringToEnum(
00110                     itExclud->getParameter<std::string>("ExcludedCondCategory")));
00111 
00112         } else {
00113             m_excludedCondCategory.push_back(CondNull);
00114         }
00115 
00116         if (!(itExclud->getParameter<std::string>("ExcludedCondType")).empty() ) {
00117 
00118             m_excludedCondType.push_back(l1GtConditionTypeStringToEnum(
00119                     itExclud->getParameter<std::string> ("ExcludedCondType")));
00120 
00121         } else {
00122             m_excludedCondType.push_back(TypeNull);
00123         }
00124 
00125         if (!(itExclud->getParameter<std::string>("ExcludedL1GtObject")).empty() ) {
00126 
00127             m_excludedL1GtObject.push_back(l1GtObjectStringToEnum(
00128                     itExclud->getParameter<std::string> ("ExcludedL1GtObject")));
00129 
00130         }  else {
00131             m_excludedL1GtObject.push_back(ObjNull);
00132         }
00133     }
00134 
00135 
00136     LogDebug("L1GtHwValidation")
00137             << "\nInput tag for the L1 GT DAQ hardware record:       "
00138             << m_l1GtDataDaqInputTag
00139             << "\nInput tag for the L1 GT EVM hardware record:       "
00140             << m_l1GtDataEvmInputTag
00141             << "\nInput tag for the L1 GT DAQ emulator records:          "
00142             << m_l1GtEmulDaqInputTag
00143             << "\nInput tag for the L1 GT EVM emulator records:          "
00144             << m_l1GtEmulEvmInputTag
00145             << "\nInput tag for the L1 GCT hardware record:          "
00146             << m_l1GctDataInputTag << std::endl;
00147 
00148     // FIXME print in debug mode ExcludeCondCategTypeObject, ExcludeAlgoTrigByName, etc
00149 
00150     m_dbe = edm::Service<DQMStore>().operator->();
00151     if (m_dbe == 0) {
00152         edm::LogInfo("L1GtHwValidation")
00153                 << "\n Unable to get DQMStore service.";
00154     } else {
00155 
00156         if (paramSet.getUntrackedParameter<bool>("DQMStore", false)) {
00157             m_dbe->setVerbose(0);
00158         }
00159 
00160         m_dbe->setCurrentFolder(m_dirName);
00161 
00162     }
00163 
00164 }
00165 
00166 // destructor
00167 L1GtHwValidation::~L1GtHwValidation() {
00168     // empty   
00169 }
00170 
00171 // member functions
00172 
00173 // method called once each job just before starting event loop
00174 void L1GtHwValidation::beginJob() {
00175 
00176     DQMStore* dbe = 0;
00177     dbe = edm::Service<DQMStore>().operator->();
00178 
00179     // clean up directory
00180     if (dbe) {
00181         dbe->setCurrentFolder(m_dirName);
00182         if (dbe->dirExists(m_dirName)) {
00183             dbe->rmdir(m_dirName);
00184         }
00185         dbe->setCurrentFolder(m_dirName);
00186     }
00187 
00188     // book histograms
00189     bookHistograms();
00190 
00191 }
00192 
00193 void L1GtHwValidation::beginRun(const edm::Run& iRun,
00194         const edm::EventSetup& evSetup) {
00195 
00196     m_nrEvRun = 0;
00197 
00198     // get / update the trigger menu from the EventSetup
00199     // local cache & check on cacheIdentifier
00200 
00201     unsigned long long l1GtMenuCacheID =
00202             evSetup.get<L1GtTriggerMenuRcd>().cacheIdentifier();
00203 
00204     if (m_l1GtMenuCacheID != l1GtMenuCacheID) {
00205 
00206         edm::ESHandle<L1GtTriggerMenu> l1GtMenu;
00207         evSetup.get<L1GtTriggerMenuRcd>().get(l1GtMenu);
00208         m_l1GtMenu = l1GtMenu.product();
00209 
00210         // compute the list of algorithms excluded from the computing of the agreement flag
00211         m_excludedAlgoList.clear();
00212         excludedAlgoList();
00213 
00214         m_l1GtMenuCacheID = l1GtMenuCacheID;
00215 
00216     }
00217 
00218 
00219 
00220     // FIXME when the menu changes, make a copy of histograms, and clear the old one
00221     //       otherwise the labels are wrong
00222 
00223     LogDebug("L1GtHwValidation") << "\nUsing L1 menu: \n  "
00224             << m_l1GtMenu->gtTriggerMenuImplementation() << "\n"
00225             << std::endl;
00226 
00227     const AlgorithmMap& algorithmMap = m_l1GtMenu->gtAlgorithmMap();
00228 
00229     for (CItAlgo itAlgo = algorithmMap.begin(); itAlgo != algorithmMap.end(); itAlgo++) {
00230 
00231         const int algBitNumber = (itAlgo->second).algoBitNumber();
00232 
00233         std::stringstream ss;
00234         std::string algBitString;
00235         ss << std::uppercase << algBitNumber;
00236         ss >> algBitString;
00237 
00238         const std::string& aName = algBitString + " " + itAlgo->first;
00239         const char* algName = aName.c_str();
00240 
00241         for (int iRec = 0; iRec < NumberOfGtRecords; ++iRec) {
00242             for (int iBxInEvent = 0; iBxInEvent < TotalBxInEvent; ++iBxInEvent) {
00243 
00244 
00245                 // convert [0, TotalBxInEvent] to [-X, +X]
00246                 int iIndex = iBxInEvent - ((TotalBxInEvent + 1) / 2 - 1);
00247                 int hIndex = (iIndex + 16) % 16;
00248 
00249                 std::stringstream ss;
00250                 std::string str;
00251                 ss << std::uppercase << std::hex << hIndex;
00252                 ss >> str;
00253 
00254                 if (iRec == 0) {
00255                     if (m_dbe) {
00256                         m_dbe->setCurrentFolder(m_dirName + "/DAQ/BxInEvent_" + str);
00257                     }
00258 
00259                 } else {
00260                     if (m_dbe) {
00261                         m_dbe->setCurrentFolder(m_dirName + "/EVM/BxInEvent_" + str);
00262                     }
00263                 }
00264 
00265 
00266                 m_fdlDataAlgoDecision[iBxInEvent][iRec]->setBinLabel(
00267                         algBitNumber + 1, algName, 1);
00268                 m_fdlDataAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(
00269                         algBitNumber + 1, algName, 1);
00270                 m_fdlDataAlgoDecisionUnprescaled[iBxInEvent][iRec]->setBinLabel(
00271                         algBitNumber + 1, algName, 1);
00272                 m_fdlDataAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
00273                         algBitNumber + 1, algName, 1);
00274                 m_fdlDataAlgoDecision_NoMatch[iBxInEvent][iRec]->setBinLabel(
00275                         algBitNumber + 1, algName, 1);
00276 
00277                 m_fdlEmulAlgoDecision[iBxInEvent][iRec]->setBinLabel(
00278                         algBitNumber + 1, algName, 1);
00279                 m_fdlEmulAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(
00280                         algBitNumber + 1, algName, 1);
00281                 m_fdlEmulAlgoDecisionUnprescaled[iBxInEvent][iRec]->setBinLabel(
00282                         algBitNumber + 1, algName, 1);
00283                 m_fdlEmulAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
00284                         algBitNumber + 1, algName, 1);
00285                 m_fdlEmulAlgoDecision_NoMatch[iBxInEvent][iRec]->setBinLabel(
00286                         algBitNumber + 1, algName, 1);
00287 
00288                 m_fdlDataEmulAlgoDecision[iBxInEvent][iRec]->setBinLabel(
00289                         algBitNumber + 1, algName, 1);
00290                 m_fdlDataEmulAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(
00291                         algBitNumber + 1, algName, 1);
00292                 m_fdlDataEmulAlgoDecisionUnprescaled[iBxInEvent][iRec]->setBinLabel(
00293                         algBitNumber + 1, algName, 1);
00294                 m_fdlDataEmulAlgoDecisionUnprescaledAllowed[iBxInEvent][iRec]->setBinLabel(
00295                         algBitNumber + 1, algName, 1);
00296                 m_fdlDataEmulAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
00297                         algBitNumber + 1, algName, 1);
00298             }
00299 
00300 
00301             if (iRec == 0) {
00302                 if (m_dbe) {
00303                     m_dbe->setCurrentFolder(m_dirName + "/DAQ/");
00304                 }
00305 
00306             } else {
00307                 if (m_dbe) {
00308                     m_dbe->setCurrentFolder(m_dirName + "/EVM/");
00309                 }
00310             }
00311 
00312 
00313             m_fdlDataAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1,
00314                     algName, 1);
00315 
00316             m_fdlEmulAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1,
00317                     algName, 1);
00318 
00319             m_fdlDataEmulAlgoDecision_Err[iRec]->setBinLabel(algBitNumber
00320                     + 1, algName, 1);
00321         }
00322 
00323         //
00324         for (std::vector<int>::const_iterator itAlgo = m_excludedAlgoList.begin(); itAlgo
00325                 != m_excludedAlgoList.end(); ++itAlgo) {
00326 
00327             if (algBitNumber == *itAlgo) {
00328                 m_excludedAlgorithmsAgreement->setBinLabel(algBitNumber
00329                         + 1, algName, 1);
00330             }
00331         }
00332 
00333 
00334     }
00335 
00336     // get / update the prescale factors from the EventSetup
00337     // local cache & check on cacheIdentifier
00338 
00339     unsigned long long l1GtPfAlgoCacheID = evSetup.get<
00340             L1GtPrescaleFactorsAlgoTrigRcd>().cacheIdentifier();
00341 
00342     if (m_l1GtPfAlgoCacheID != l1GtPfAlgoCacheID) {
00343 
00344         edm::ESHandle<L1GtPrescaleFactors> l1GtPfAlgo;
00345         evSetup.get<L1GtPrescaleFactorsAlgoTrigRcd>().get(l1GtPfAlgo);
00346         m_l1GtPfAlgo = l1GtPfAlgo.product();
00347 
00348         m_prescaleFactorsAlgoTrig = &(m_l1GtPfAlgo->gtPrescaleFactors());
00349 
00350         m_l1GtPfAlgoCacheID = l1GtPfAlgoCacheID;
00351 
00352     }
00353 
00354     unsigned long long l1GtPfTechCacheID = evSetup.get<
00355             L1GtPrescaleFactorsTechTrigRcd>().cacheIdentifier();
00356 
00357     if (m_l1GtPfTechCacheID != l1GtPfTechCacheID) {
00358 
00359         edm::ESHandle<L1GtPrescaleFactors> l1GtPfTech;
00360         evSetup.get<L1GtPrescaleFactorsTechTrigRcd>().get(l1GtPfTech);
00361         m_l1GtPfTech = l1GtPfTech.product();
00362 
00363         m_prescaleFactorsTechTrig = &(m_l1GtPfTech->gtPrescaleFactors());
00364 
00365         m_l1GtPfTechCacheID = l1GtPfTechCacheID;
00366 
00367     }
00368 
00369     // get / update the trigger mask from the EventSetup
00370     // local cache & check on cacheIdentifier
00371 
00372     unsigned long long l1GtTmAlgoCacheID = evSetup.get<
00373             L1GtTriggerMaskAlgoTrigRcd>().cacheIdentifier();
00374 
00375     if (m_l1GtTmAlgoCacheID != l1GtTmAlgoCacheID) {
00376 
00377         edm::ESHandle<L1GtTriggerMask> l1GtTmAlgo;
00378         evSetup.get<L1GtTriggerMaskAlgoTrigRcd>().get(l1GtTmAlgo);
00379         m_l1GtTmAlgo = l1GtTmAlgo.product();
00380 
00381         m_triggerMaskAlgoTrig = m_l1GtTmAlgo->gtTriggerMask();
00382 
00383         m_l1GtTmAlgoCacheID = l1GtTmAlgoCacheID;
00384 
00385     }
00386 
00387     unsigned long long l1GtTmTechCacheID = evSetup.get<
00388             L1GtTriggerMaskTechTrigRcd>().cacheIdentifier();
00389 
00390     if (m_l1GtTmTechCacheID != l1GtTmTechCacheID) {
00391 
00392         edm::ESHandle<L1GtTriggerMask> l1GtTmTech;
00393         evSetup.get<L1GtTriggerMaskTechTrigRcd>().get(l1GtTmTech);
00394         m_l1GtTmTech = l1GtTmTech.product();
00395 
00396         m_triggerMaskTechTrig = m_l1GtTmTech->gtTriggerMask();
00397 
00398         m_l1GtTmTechCacheID = l1GtTmTechCacheID;
00399 
00400     }
00401 
00402 }
00403 
00404 //compare the GTFE board
00405 void L1GtHwValidation::compareGTFE(const edm::Event& iEvent,
00406         const edm::EventSetup& evSetup, const L1GtfeWord& gtfeBlockData,
00407         const L1GtfeWord& gtfeBlockEmul, const int iRec) {
00408 
00409     std::string recString;
00410     if (iRec == 0) {
00411         recString = "DAQ";
00412         if (m_dbe) {
00413             m_dbe->setCurrentFolder(m_dirName + "/DAQ/");
00414         }
00415     } else {
00416         recString = "EVM";
00417         if (m_dbe) {
00418             m_dbe->setCurrentFolder(m_dirName + "/EVM/");
00419         }
00420     }
00421 
00422     if (gtfeBlockData == gtfeBlockEmul) {
00423         m_myCoutStream << "\n" << recString
00424                 << " Data and emulated GTFE blocks: identical.\n";
00425         gtfeBlockData.print(m_myCoutStream);
00426     } else {
00427         m_myCoutStream << "\n" << recString
00428                 << " Data and emulated GTFE blocks: different.\n";
00429 
00430         m_myCoutStream << "\nData: GTFE block\n";
00431         gtfeBlockData.print(m_myCoutStream);
00432 
00433         m_myCoutStream << "\nEmul: GTFE block\n";
00434         gtfeBlockEmul.print(m_myCoutStream);
00435 
00436     }
00437 
00438     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00439 
00440     m_myCoutStream.str("");
00441     m_myCoutStream.clear();
00442 
00443     // get BoardId value
00444     const boost::uint16_t boardIdData = gtfeBlockData.boardId();
00445     const boost::uint16_t boardIdEmul = gtfeBlockEmul.boardId();
00446 
00447     if (boardIdData == boardIdEmul) {
00448         m_myCoutStream << "\n" << recString
00449                 << " Data and emulated GTFE boardId identical.";
00450         m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
00451                 << std::setfill('0') << boardIdData << std::setfill(' ')
00452                 << std::dec;
00453         m_myCoutStream << "\n";
00454 
00455     } else {
00456         m_myCoutStream << "\n" << recString
00457                 << " Data and emulated GTFE boardId different.";
00458         m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
00459                 << std::setw(4) << std::setfill('0') << boardIdData
00460                 << std::setfill(' ') << std::dec;
00461         m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
00462                 << std::setw(4) << std::setfill('0') << boardIdEmul
00463                 << std::setfill(' ') << std::dec;
00464         m_myCoutStream << "\n";
00465         m_gtfeDataEmul[iRec]->Fill(0);
00466 
00467     }
00468 
00470     const boost::uint16_t recordLength1Data = gtfeBlockData.recordLength1();
00471     const boost::uint16_t recordLength1Emul = gtfeBlockEmul.recordLength1();
00472 
00473     if (recordLength1Data == recordLength1Emul) {
00474         m_myCoutStream << "\n" << recString
00475                 << " Data and emulated GTFE recordLength for alternative 1 identical.";
00476         m_myCoutStream << "\n recordLength1() = " << recordLength1Data;
00477         m_myCoutStream << "\n";
00478 
00479     } else {
00480         m_myCoutStream << "\n" << recString
00481                 << " Data and emulated GTFE recordLength for alternative 1 different.";
00482         m_myCoutStream << "\n Data: recordLength1() = " << recordLength1Data;
00483         m_myCoutStream << "\n Emul: recordLength1() = " << recordLength1Emul;
00484         m_myCoutStream << "\n";
00485         m_gtfeDataEmul[iRec]->Fill(1);
00486 
00487     }
00488 
00490     const boost::uint16_t recordLengthData = gtfeBlockData.recordLength();
00491     const boost::uint16_t recordLengthEmul = gtfeBlockEmul.recordLength();
00492 
00493     if (recordLengthData == recordLengthEmul) {
00494         m_myCoutStream << "\n" << recString
00495                 << " Data and emulated GTFE recordLength for alternative 0 identical.";
00496         m_myCoutStream << "\n recordLength() = " << recordLengthData;
00497         m_myCoutStream << "\n";
00498 
00499     } else {
00500         m_myCoutStream << "\n" << recString
00501                 << " Data and emulated GTFE recordLength for alternative 1 different.";
00502         m_myCoutStream << "\n Data: recordLength() = " << recordLengthData;
00503         m_myCoutStream << "\n Emul: recordLength() = " << recordLengthEmul;
00504         m_myCoutStream << "\n";
00505         m_gtfeDataEmul[iRec]->Fill(2);
00506 
00507     }
00508 
00510     const boost::uint16_t bxNrData = gtfeBlockData.bxNr();
00511     const boost::uint16_t bxNrEmul = gtfeBlockEmul.bxNr();
00512 
00513     if (bxNrData == bxNrEmul) {
00514         m_myCoutStream << "\n" << recString
00515                 << " Data and emulated GTFE bxNr identical.";
00516         m_myCoutStream << "\n bxNr() = " << bxNrData;
00517         m_myCoutStream << "\n";
00518 
00519     } else {
00520         m_myCoutStream << "\n" << recString
00521                 << " Data and emulated GTFE bxNr different.";
00522         m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
00523         m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
00524         m_myCoutStream << "\n";
00525         m_gtfeDataEmul[iRec]->Fill(3);
00526 
00527     }
00528 
00530     const boost::uint32_t setupVersionData = gtfeBlockData.setupVersion();
00531     const boost::uint32_t setupVersionEmul = gtfeBlockEmul.setupVersion();
00532 
00533     if (setupVersionData == setupVersionEmul) {
00534         m_myCoutStream << "\n" << recString
00535                 << " Data and emulated GTFE setupVersion identical.";
00536         m_myCoutStream << "\n setupVersion() = " << setupVersionData;
00537         m_myCoutStream << "\n";
00538 
00539     } else {
00540         m_myCoutStream << "\n" << recString
00541                 << " Data and emulated GTFE setupVersion different.";
00542         m_myCoutStream << "\n Data: setupVersion() = " << setupVersionData;
00543         m_myCoutStream << "\n Emul: setupVersion() = " << setupVersionEmul;
00544         m_myCoutStream << "\n";
00545         m_gtfeDataEmul[iRec]->Fill(4);
00546 
00547     }
00548 
00550     const boost::uint16_t activeBoardsData = gtfeBlockData.activeBoards();
00551     const boost::uint16_t activeBoardsEmul = gtfeBlockEmul.activeBoards();
00552 
00553     if (activeBoardsData == activeBoardsEmul) {
00554         m_myCoutStream << "\n" << recString
00555                 << " Data and emulated GTFE activeBoards identical.";
00556         m_myCoutStream << "\n activeBoards() = " << std::hex << "0x"
00557                 << std::setw(4) << std::setfill('0') << activeBoardsData
00558                 << std::setfill(' ') << std::dec;
00559         m_myCoutStream << "\n";
00560 
00561     } else {
00562         m_myCoutStream << "\n" << recString
00563                 << " Data and emulated GTFE activeBoards different.";
00564         m_myCoutStream << "\n Data: activeBoards() = " << std::hex << "0x"
00565                 << std::setw(4) << std::setfill('0') << activeBoardsData
00566                 << std::setfill(' ') << std::dec;
00567         m_myCoutStream << "\n Emul: activeBoards() = " << std::hex << "0x"
00568                 << std::setw(4) << std::setfill('0') << activeBoardsEmul
00569                 << std::setfill(' ') << std::dec;
00570         m_myCoutStream << "\n";
00571         m_gtfeDataEmul[iRec]->Fill(5);
00572 
00573     }
00578     const boost::uint16_t altNrBxBoardData = gtfeBlockData.altNrBxBoard();
00579     const boost::uint16_t altNrBxBoardEmul = gtfeBlockEmul.altNrBxBoard();
00580 
00581     if (altNrBxBoardData == altNrBxBoardEmul) {
00582         m_myCoutStream << "\n" << recString
00583                 << " Data and emulated GTFE altNrBxBoard identical.";
00584         m_myCoutStream << "\n altNrBxBoard() = " << altNrBxBoardData;
00585         m_myCoutStream << "\n";
00586 
00587     } else {
00588         m_myCoutStream << "\n" << recString
00589                 << " Data and emulated GTFE altNrBxBoard different.";
00590         m_myCoutStream << "\n Data: altNrBxBoard() = " << altNrBxBoardData;
00591         m_myCoutStream << "\n Emul: altNrBxBoard() = " << altNrBxBoardEmul;
00592         m_myCoutStream << "\n";
00593         m_gtfeDataEmul[iRec]->Fill(6);
00594 
00595     }
00596 
00598     const boost::uint32_t totalTriggerNrData = gtfeBlockData.totalTriggerNr();
00599     const boost::uint32_t totalTriggerNrEmul = gtfeBlockEmul.totalTriggerNr();
00600 
00601     if (totalTriggerNrData == totalTriggerNrEmul) {
00602         m_myCoutStream << "\n" << recString
00603                 << " Data and emulated GTFE totalTriggerNr identical.";
00604         m_myCoutStream << "\n totalTriggerNr() = " << totalTriggerNrData;
00605         m_myCoutStream << "\n";
00606 
00607     } else {
00608         m_myCoutStream << "\n" << recString
00609                 << " Data and emulated GTFE totalTriggerNr different.";
00610         m_myCoutStream << "\n Data: totalTriggerNr() = " << totalTriggerNrData;
00611         m_myCoutStream << "\n Emul: totalTriggerNr() = " << totalTriggerNrEmul;
00612         m_myCoutStream << "\n";
00613         m_gtfeDataEmul[iRec]->Fill(7);
00614 
00615     }
00616 
00617     edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00618     m_myCoutStream.str("");
00619     m_myCoutStream.clear();
00620 
00621 }
00622 
00623 //compare the FDL board
00624 void L1GtHwValidation::compareFDL(const edm::Event& iEvent,
00625         const edm::EventSetup& evSetup, const L1GtFdlWord& fdlBlockData,
00626         const L1GtFdlWord& fdlBlockEmul, const int iRec) {
00627 
00628     // index of physics partition
00629     int PhysicsPartition = 0;
00630 
00631     // 
00632     std::string recString;
00633     if (iRec == 0) {
00634         recString = "DAQ";
00635         if (m_dbe) {
00636             m_dbe->setCurrentFolder(m_dirName + "/DAQ/");
00637         }
00638     } else {
00639         recString = "EVM";
00640         if (m_dbe) {
00641             m_dbe->setCurrentFolder(m_dirName + "/EVM/");
00642         }
00643     }
00644 
00645     if (fdlBlockData == fdlBlockEmul) {
00646         m_myCoutStream << "\n" << recString
00647                 << " Data and emulated FDL blocks: identical.\n";
00648         fdlBlockData.print(m_myCoutStream);
00649 
00650     } else {
00651         m_myCoutStream << "\n" << recString
00652                 << " Data and emulated FDL blocks: different.\n";
00653 
00654         m_myCoutStream << "\nData: FDL block\n";
00655         fdlBlockData.print(m_myCoutStream);
00656 
00657         m_myCoutStream << "\nEmul: FDL block\n";
00658         fdlBlockEmul.print(m_myCoutStream);
00659 
00660     }
00661 
00662     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00663 
00664     m_myCoutStream.str("");
00665     m_myCoutStream.clear();
00666 
00667     // get bunch cross in the GT event record - 
00668     // move it first as histograms are BxInEvent dependent
00669     const int bxInEventData = fdlBlockData.bxInEvent();
00670     const int bxInEventEmul = fdlBlockEmul.bxInEvent();
00671 
00672     bool matchBxInEvent = false;
00673 
00674     if (bxInEventData == bxInEventEmul) {
00675         m_myCoutStream << "\n" << recString
00676                 << " Data and emulated FDL bxInEvent identical.";
00677         m_myCoutStream << "\n bxInEvent() = " << bxInEventData;
00678         m_myCoutStream << "\n";
00679         matchBxInEvent = true;
00680 
00681     } else {
00682         m_myCoutStream << "\n" << recString
00683                 << " Data and emulated FDL bxInEvent different.";
00684         m_myCoutStream << "\n Data: bxInEvent() = " << bxInEventData;
00685         m_myCoutStream << "\n Emul: bxInEvent() = " << bxInEventEmul;
00686         m_myCoutStream << "\n";
00687 
00688         m_fdlDataEmul_Err[iRec]->Fill(1);
00689 
00690         if (iRec == 0) {
00691             m_agree = false;
00692 
00693             m_myCoutStream << "\nDisagreement data versus emulator: "
00694                     << "\n  Data and emulated FDL bxInEvent different \n";
00695         }
00696 
00697     }
00698 
00699     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00700     m_myCoutStream.str("");
00701     m_myCoutStream.clear();
00702 
00703     // symmetrize 
00704     bool validBxInEvent = false;
00705     int histIndex = bxInEventData + (TotalBxInEvent + 1) / 2 - 1;
00706     LogDebug("L1GtHwValidation") << "\n Convert bxInEvent = " << bxInEventData
00707             << " to histIndex = " << histIndex << std::endl;
00708     if ((histIndex <= TotalBxInEvent) && (histIndex >= 0)) {
00709         validBxInEvent = true;
00710     }
00711 
00712     // loop over algorithms and increase the corresponding counters
00713 
00714     // get BoardId value
00715     const boost::uint16_t boardIdData = fdlBlockData.boardId();
00716     const boost::uint16_t boardIdEmul = fdlBlockEmul.boardId();
00717 
00718     if (boardIdData == boardIdEmul) {
00719         m_myCoutStream << "\n" << recString
00720                 << " Data and emulated FDL boardId identical.";
00721         m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
00722                 << std::setfill('0') << boardIdData << std::setfill(' ')
00723                 << std::dec;
00724         m_myCoutStream << "\n";
00725 
00726     } else {
00727         m_myCoutStream << "\n" << recString
00728                 << " Data and emulated FDL boardId different.";
00729         m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
00730                 << std::setw(4) << std::setfill('0') << boardIdData
00731                 << std::setfill(' ') << std::dec;
00732         m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
00733                 << std::setw(4) << std::setfill('0') << boardIdEmul
00734                 << std::setfill(' ') << std::dec;
00735         m_myCoutStream << "\n";
00736 
00737         if (matchBxInEvent && validBxInEvent) {
00738             m_fdlDataEmul[histIndex][iRec]->Fill(0);
00739         } else {
00740             m_fdlDataEmul_Err[iRec]->Fill(0);
00741         }
00742 
00743     }
00744 
00745     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00746     m_myCoutStream.str("");
00747     m_myCoutStream.clear();
00748 
00749     // get BxNr - bunch cross number of the actual bx
00750     const boost::uint16_t bxNrData = fdlBlockData.bxNr();
00751     const boost::uint16_t bxNrEmul = fdlBlockEmul.bxNr();
00752 
00753     if (bxNrData == bxNrEmul) {
00754         m_myCoutStream << "\n" << recString
00755                 << " Data and emulated FDL bxNr identical.";
00756         m_myCoutStream << "\n bxNr() = " << bxNrData;
00757         m_myCoutStream << "\n";
00758 
00759     } else {
00760         m_myCoutStream << "\n" << recString
00761                 << " Data and emulated FDL bxNr different.";
00762         m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
00763         m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
00764         m_myCoutStream << "\n";
00765 
00766         if (matchBxInEvent && validBxInEvent) {
00767             m_fdlDataEmul[histIndex][iRec]->Fill(2);
00768         } else {
00769             m_fdlDataEmul_Err[iRec]->Fill(2);
00770         }
00771     }
00772 
00773     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00774     m_myCoutStream.str("");
00775     m_myCoutStream.clear();
00776 
00777     // get event number since last L1 reset generated in FDL
00778     const boost::uint32_t eventNrData = fdlBlockData.eventNr();
00779     const boost::uint32_t eventNrEmul = fdlBlockEmul.eventNr();
00780 
00781     if (eventNrData == eventNrEmul) {
00782         m_myCoutStream << "\n" << recString
00783                 << " Data and emulated FDL eventNr identical.";
00784         m_myCoutStream << "\n eventNr() = " << eventNrData;
00785         m_myCoutStream << "\n";
00786 
00787     } else {
00788         m_myCoutStream << "\n" << recString
00789                 << " Data and emulated FDL eventNr different.";
00790         m_myCoutStream << "\n Data: eventNr() = " << eventNrData;
00791         m_myCoutStream << "\n Emul: eventNr() = " << eventNrEmul;
00792         m_myCoutStream << "\n";
00793 
00794         if (matchBxInEvent && validBxInEvent) {
00795             m_fdlDataEmul[histIndex][iRec]->Fill(3);
00796         } else {
00797             m_fdlDataEmul_Err[iRec]->Fill(3);
00798         }
00799 
00800     }
00801 
00802     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00803     m_myCoutStream.str("");
00804     m_myCoutStream.clear();
00805 
00806     // get  technical trigger bits
00807     const TechnicalTriggerWord& gtTechnicalTriggerWordData =
00808             fdlBlockData.gtTechnicalTriggerWord();
00809     const TechnicalTriggerWord& gtTechnicalTriggerWordEmul =
00810             fdlBlockEmul.gtTechnicalTriggerWord();
00811 
00812     int nTechBits = gtTechnicalTriggerWordData.size();
00813 
00814     TechnicalTriggerWord gtTechnicalTriggerWordDataMask(nTechBits);
00815     TechnicalTriggerWord gtTechnicalTriggerWordEmulMask(nTechBits);
00816 
00817     unsigned int bitValue = 0;
00818 
00819     if (matchBxInEvent && validBxInEvent) {
00820         for (int iBit = 0; iBit < nTechBits; ++iBit) {
00821 
00822             unsigned int triggerMask = (m_triggerMaskTechTrig.at(iBit)) & (1
00823                     << PhysicsPartition);
00824 
00825             if (gtTechnicalTriggerWordData[iBit]) {
00826                 m_fdlDataTechDecision[histIndex][iRec]->Fill(iBit);
00827 
00828                 bitValue = (triggerMask) ? 0 : 1;
00829                 gtTechnicalTriggerWordDataMask[iBit] = bitValue;
00830                 if (bitValue) {
00831                     m_fdlDataTechDecisionMask[histIndex][iRec]->Fill(iBit);
00832                 }
00833             }
00834 
00835             if (gtTechnicalTriggerWordEmul.at(iBit)) {
00836                 m_fdlEmulTechDecision[histIndex][iRec]->Fill(iBit);
00837 
00838                 bitValue = (triggerMask) ? 0 : 1;
00839                 gtTechnicalTriggerWordEmulMask[iBit] = bitValue;
00840                 if (bitValue) {
00841                     m_fdlEmulTechDecisionMask[histIndex][iRec]->Fill(iBit);
00842                 }
00843             }
00844         }
00845     } else {
00846         for (int iBit = 0; iBit < nTechBits; ++iBit) {
00847 
00848             if (gtTechnicalTriggerWordData[iBit]) {
00849                 m_fdlDataTechDecision_Err[iRec]->Fill(iBit);
00850             }
00851 
00852             if (gtTechnicalTriggerWordEmul.at(iBit)) {
00853                 m_fdlEmulTechDecision_Err[iRec]->Fill(iBit);
00854             }
00855         }
00856     }
00857 
00858     if (gtTechnicalTriggerWordData == gtTechnicalTriggerWordEmul) {
00859         m_myCoutStream << "\n" << recString
00860                 << " Data and emulated FDL gtTechnicalTriggerWord identical.\n";
00861         fdlBlockData.printGtTechnicalTriggerWord(m_myCoutStream);
00862         m_myCoutStream << "\n";
00863 
00864     } else {
00865         m_myCoutStream << "\n" << recString
00866                 << " Data and emulated FDL gtTechnicalTriggerWord different.";
00867         m_myCoutStream << "\n Data: ";
00868         fdlBlockData.printGtTechnicalTriggerWord(m_myCoutStream);
00869         m_myCoutStream << "\n Emul: ";
00870         fdlBlockEmul.printGtTechnicalTriggerWord(m_myCoutStream);
00871         m_myCoutStream << "\n";
00872 
00873         if (matchBxInEvent && validBxInEvent) {
00874             m_fdlDataEmul[histIndex][iRec]->Fill(4);
00875         } else {
00876             m_fdlDataEmul_Err[iRec]->Fill(4);
00877         }
00878 
00879         if (matchBxInEvent && validBxInEvent) {
00880             for (int iBit = 0; iBit < nTechBits; ++iBit) {
00881                 if (gtTechnicalTriggerWordData[iBit]
00882                         != gtTechnicalTriggerWordEmul.at(iBit)) {
00883                     m_fdlDataEmulTechDecision[histIndex][iRec]->Fill(iBit);
00884                 }
00885             }
00886         } else {
00887             for (int iBit = 0; iBit < nTechBits; ++iBit) {
00888                 if (gtTechnicalTriggerWordData[iBit]
00889                         != gtTechnicalTriggerWordEmul.at(iBit)) {
00890                     m_fdlDataEmulTechDecision_Err[iRec]->Fill(iBit);
00891                 }
00892             }
00893         }
00894     }
00895 
00896     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00897     m_myCoutStream.str("");
00898     m_myCoutStream.clear();
00899 
00900     if (gtTechnicalTriggerWordDataMask == gtTechnicalTriggerWordEmulMask) {
00901         m_myCoutStream << "\n" << recString
00902                 << " Data and emulated FDL gtTechnicalTriggerWord after mask identical.\n";
00903         m_myCoutStream << "\n";
00904 
00905     } else {
00906         m_myCoutStream << "\n" << recString
00907                 << " Data and emulated FDL gtTechnicalTriggerWord after mask different.";
00908         m_myCoutStream << "\n Data: ";
00909         m_myCoutStream << "\n Emul: ";
00910         m_myCoutStream << "\n";
00911 
00912         if (matchBxInEvent && validBxInEvent) {
00913             m_fdlDataEmul[histIndex][iRec]->Fill(5);
00914         } else {
00915             m_fdlDataEmul_Err[iRec]->Fill(5);
00916         }
00917 
00918         if (matchBxInEvent && validBxInEvent) {
00919             for (int iBit = 0; iBit < nTechBits; ++iBit) {
00920                 if (gtTechnicalTriggerWordData[iBit]
00921                         != gtTechnicalTriggerWordEmul.at(iBit)) {
00922                     m_fdlDataEmulTechDecisionMask[histIndex][iRec]->Fill(iBit);
00923                 }
00924             }
00925         }
00926     }
00927 
00928     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
00929     m_myCoutStream.str("");
00930     m_myCoutStream.clear();
00931 
00932     // get algorithms bits (decision word)
00933     const DecisionWord& gtDecisionWordData = fdlBlockData.gtDecisionWord();
00934     const DecisionWord& gtDecisionWordEmul = fdlBlockEmul.gtDecisionWord();
00935 
00936     int nAlgoBits = gtDecisionWordData.size();
00937 
00938     DecisionWord gtDecisionWordDataMask(nAlgoBits);
00939     DecisionWord gtDecisionWordEmulMask(nAlgoBits);
00940 
00941     // get the index of the prescale factor set from data
00942     int iPfSet = fdlBlockData.gtPrescaleFactorIndexAlgo();
00943 
00944     // check that the prescale factor is not out of range for the prescale factor
00945     // record retrieved from event setup
00946     size_t pfSetsSize = (*m_prescaleFactorsAlgoTrig).size();
00947 
00948     if (iPfSet < 0) {
00949 
00950         LogDebug("L1GtHwValidation")
00951                 << "\nError: index of prescale factor set retrieved from the data \n"
00952                 << "less than zero."
00953                 << "\n  Value of index retrieved from data = " << iPfSet
00954                 << std::endl;
00955 
00956         // FIXME add a histogram to be used for a quality test
00957 
00958         return;
00959 
00960     } else if (iPfSet >= (static_cast<int>(pfSetsSize))) {
00961 
00962         LogDebug("L1GtHwValidation")
00963                 << "\nError: index of prescale factor set retrieved from the data \n"
00964                 << "greater than the size of the vector of prescale factor sets."
00965                 << "\n  Value of index retrieved from data = " << iPfSet
00966                 << "\n  Vector size = " << pfSetsSize << std::endl;
00967 
00968         // FIXME add a histogram to be used for a quality test
00969 
00970         return;
00971 
00972     }
00973 
00974     const std::vector<int>& prescaleFactorsAlgoTrig =
00975             (*m_prescaleFactorsAlgoTrig).at(iPfSet);
00976 
00977 
00978     if (matchBxInEvent && validBxInEvent) {
00979 
00980         for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
00981 
00982             unsigned int triggerMask = (m_triggerMaskAlgoTrig.at(iBit)) & (1
00983                     << PhysicsPartition);
00984 
00985             int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
00986 
00987             LogTrace("L1GtHwValidation") << "Bit " << iBit
00988                     << ": prescale factor = " << prescaleFactor
00989                     << " trigger mask = " << triggerMask << std::endl;
00990 
00991             if (gtDecisionWordData[iBit]) {
00992                 m_fdlDataAlgoDecision[histIndex][iRec]->Fill(iBit);
00993 
00994                 if (prescaleFactor == 1) {
00995                     m_fdlDataAlgoDecisionUnprescaled[histIndex][iRec]->Fill(
00996                             iBit);
00997                 } else {
00998                     m_fdlDataAlgoDecisionPrescaled[histIndex][iRec]->Fill(iBit);
00999                 }
01000 
01001                 bitValue = (triggerMask) ? 0 : 1;
01002                 gtDecisionWordDataMask[iBit] = bitValue;
01003                 if (bitValue) {
01004                     m_fdlDataAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
01005                 }
01006             }
01007 
01008             if (gtDecisionWordEmul.at(iBit)) {
01009                 m_fdlEmulAlgoDecision[histIndex][iRec]->Fill(iBit);
01010 
01011                 bitValue = (triggerMask) ? 0 : 1;
01012                 gtDecisionWordEmulMask[iBit] = bitValue;
01013                 if (bitValue) {
01014                     m_fdlEmulAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
01015                 }
01016             }
01017         }
01018     } else {
01019         for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
01020             if (gtDecisionWordData[iBit]) {
01021                 m_fdlDataAlgoDecision_Err[iRec]->Fill(iBit);
01022             }
01023         }
01024 
01025         for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
01026             if (gtDecisionWordEmul.at(iBit)) {
01027                 m_fdlEmulAlgoDecision_Err[iRec]->Fill(iBit);
01028             }
01029         }
01030 
01031         if (iRec == 0) {
01032             m_agree = false;
01033 
01034             m_myCoutStream << "\nDisagreement data versus emulator: "
01035                     << "\n  matchBxInEvent && validBxInEvent false \n";
01036         }
01037 
01038     }
01039 
01040     if (gtDecisionWordData == gtDecisionWordEmul) {
01041         m_myCoutStream << "\n" << recString
01042                 << " Data and emulated FDL gtDecisionWord identical.";
01043         fdlBlockData.printGtDecisionWord(m_myCoutStream);
01044         m_myCoutStream << "\n";
01045 
01046     } else {
01047         m_myCoutStream << "\n" << recString
01048                 << " Data and emulated FDL gtDecisionWord different.";
01049         m_myCoutStream << "\n Data: ";
01050         fdlBlockData.printGtDecisionWord(m_myCoutStream);
01051         m_myCoutStream << "\n Emul: ";
01052         fdlBlockEmul.printGtDecisionWord(m_myCoutStream);
01053         m_myCoutStream << "\n";
01054 
01055         if (matchBxInEvent && validBxInEvent) {
01056             m_fdlDataEmul[histIndex][iRec]->Fill(6);
01057         } else {
01058             m_fdlDataEmul_Err[iRec]->Fill(6);
01059         }
01060 
01061         if (matchBxInEvent && validBxInEvent) {
01062             for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
01063 
01064                 int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
01065 
01066                 if (gtDecisionWordData[iBit] != gtDecisionWordEmul.at(iBit)) {
01067 
01068                     m_fdlDataEmulAlgoDecision[histIndex][iRec]->Fill(iBit);
01069 
01070                     // for excluded algorithms, fill mismatch for BxInEvent = 0 and DAQ record only
01071                     if (excludedAlgo(iBit) && (bxInEventData == 0) && (iRec
01072                             == 0)) {
01073                         m_excludedAlgorithmsAgreement->Fill(iBit);
01074                     }
01075 
01076                     if (prescaleFactor == 1) {
01077                         m_fdlDataEmulAlgoDecisionUnprescaled[histIndex][iRec]->Fill(
01078                                 iBit);
01079 
01080                         // fill a histogram for allowed algorithm triggers only
01081                         if (!excludedAlgo(iBit)) {
01082                             m_fdlDataEmulAlgoDecisionUnprescaledAllowed[histIndex][iRec]->Fill(
01083                                     iBit);
01084                         }
01085 
01086                     } else {
01087                         m_fdlDataEmulAlgoDecisionPrescaled[histIndex][iRec]->Fill(
01088                                 iBit);
01089                     }
01090 
01091                     if (gtDecisionWordData[iBit]) {
01092                         m_fdlDataAlgoDecision_NoMatch[histIndex][iRec]->Fill(
01093                                 iBit);
01094 
01095                         if (prescaleFactor == 1) {
01096                             m_fdlDataAlgoDecisionUnprescaled_NoMatch[histIndex][iRec]->Fill(
01097                                     iBit);
01098 
01099                             // compare for agreement only unprescaled algorithms and algorithms which
01100                             // are not excluded from comparison
01101                             if ((!excludedAlgo(iBit)) && (bxInEventData == 0)
01102                                     && (iRec == 0)) {
01103                                 m_agree = false;
01104                                 m_dataOnly = true;
01105 
01106                                 m_myCoutStream
01107                                         << "\nDisagreement data versus emulator: "
01108                                         << "result before mask for algorithm with bit number "
01109                                         << iBit
01110                                         << "\n  Data: true, emulator: false \n";
01111                             }
01112 
01113                         } else {
01114                             m_fdlDataAlgoDecisionPrescaled_NoMatch[histIndex][iRec]->Fill(
01115                                     iBit);
01116                         }
01117 
01118                     } else {
01119                         m_fdlEmulAlgoDecision_NoMatch[histIndex][iRec]->Fill(
01120                                 iBit);
01121 
01122                         if (prescaleFactor == 1) {
01123                             m_fdlEmulAlgoDecisionUnprescaled_NoMatch[histIndex][iRec]->Fill(
01124                                     iBit);
01125 
01126                             // compare for agreement only unprescaled algorithms and algorithms which
01127                             // are not excluded from comparison
01128                             if ((!excludedAlgo(iBit)) && (bxInEventData == 0)
01129                                     && (iRec == 0)) {
01130                                 m_agree = false;
01131                                 m_emulOnly = true;
01132 
01133                                 m_myCoutStream
01134                                         << "\nDisagreement data versus emulator: "
01135                                         << "result before mask for algorithm with bit number "
01136                                         << iBit
01137                                         << "\n  Data: false, emulator: true \n";
01138                             }
01139 
01140                         } else {
01141                             m_fdlEmulAlgoDecisionPrescaled_NoMatch[histIndex][iRec]->Fill(
01142                                     iBit);
01143                         }
01144                     }
01145                 }
01146             }
01147         } else {
01148             for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
01149                 if (gtDecisionWordData[iBit] != gtDecisionWordEmul.at(iBit)) {
01150                     m_fdlDataEmulAlgoDecision_Err[iRec]->Fill(iBit);
01151                 }
01152             }
01153 
01154             if (iRec == 0) {
01155                 m_agree = false;
01156 
01157                 m_myCoutStream << "\nDisagreement data versus emulator: "
01158                         << "\n  matchBxInEvent && validBxInEvent false \n";
01159             }
01160         }
01161 
01162     }
01163 
01164     if (gtDecisionWordDataMask == gtDecisionWordEmulMask) {
01165         m_myCoutStream << "\n" << recString
01166                 << " Data and emulated FDL gtDecisionWord after mask identical.";
01167         m_myCoutStream << "\n";
01168 
01169     } else {
01170         m_myCoutStream << "\n" << recString
01171                 << " Data and emulated FDL gtDecisionWord after mask different.";
01172         m_myCoutStream << "\n Data: ";
01173         m_myCoutStream << "\n Emul: ";
01174         m_myCoutStream << "\n";
01175 
01176         if (matchBxInEvent && validBxInEvent) {
01177             m_fdlDataEmul[histIndex][iRec]->Fill(7);
01178         } else {
01179             m_fdlDataEmul_Err[iRec]->Fill(7);
01180         }
01181 
01182         if (matchBxInEvent && validBxInEvent) {
01183             for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
01184                 if (gtDecisionWordDataMask[iBit] != gtDecisionWordEmulMask.at(
01185                         iBit)) {
01186                     m_fdlDataEmulAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
01187 
01188 
01189                     int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
01190 
01191                     if (gtDecisionWordDataMask[iBit]) {
01192                         m_fdlDataAlgoDecisionMask_NoMatch[histIndex][iRec]->Fill(
01193                                 iBit);
01194 
01195                         if (prescaleFactor == 1) {
01196                             m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[histIndex][iRec]->Fill(
01197                                     iBit);
01198 
01199                             // compare for agreement only unprescaled algorithms and algorithms which
01200                             // are not excluded from comparison
01201                             if ((!excludedAlgo(iBit)) && (bxInEventData == 0)
01202                                     && (iRec == 0)) {
01203                                 m_agree = false;
01204                                 m_dataOnlyMask = true;
01205 
01206                                 m_myCoutStream
01207                                         << "\nDisagreement data versus emulator: "
01208                                         << "result after mask for algorithm with bit number "
01209                                         << iBit
01210                                         << " different in data versus emulator "
01211                                         << "\n  Data: true, emulator: false \n";
01212                             }
01213 
01214                         } else {
01215                             m_fdlDataAlgoDecisionPrescaledMask_NoMatch[histIndex][iRec]->Fill(
01216                                     iBit);
01217                         }
01218 
01219                     } else {
01220                         m_fdlEmulAlgoDecisionMask_NoMatch[histIndex][iRec]->Fill(
01221                                 iBit);
01222 
01223                         if (prescaleFactor == 1) {
01224                             m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[histIndex][iRec]->Fill(
01225                                     iBit);
01226 
01227                             // compare for agreement only unprescaled algorithms and algorithms which
01228                             // are not excluded from comparison
01229                             if ((!excludedAlgo(iBit)) && (bxInEventData == 0)
01230                                     && (iRec == 0)) {
01231                                 m_agree = false;
01232                                 m_emulOnlyMask = true;
01233 
01234                                 m_myCoutStream
01235                                         << "\nDisagreement data versus emulator: "
01236                                         << "result after mask for algorithm with bit number "
01237                                         << iBit
01238                                         << " different in data versus emulator "
01239                                         << "\n  Data: false, emulator: true \n";
01240                             }
01241 
01242                         } else {
01243                             m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[histIndex][iRec]->Fill(
01244                                     iBit);
01245                         }
01246                     }
01247 
01248 
01249                 }
01250             }
01251         }
01252 
01253     }
01254 
01255     // get  extended algorithms bits (extended decision word)
01256     const DecisionWordExtended gtDecisionWordExtendedData =
01257             fdlBlockData.gtDecisionWordExtended();
01258     const DecisionWordExtended gtDecisionWordExtendedEmul =
01259             fdlBlockEmul.gtDecisionWordExtended();
01260 
01261     if (gtDecisionWordExtendedData == gtDecisionWordExtendedEmul) {
01262         m_myCoutStream << "\n" << recString
01263                 << " Data and emulated FDL gtDecisionWordExtended identical.\n";
01264         fdlBlockData.printGtDecisionWordExtended(m_myCoutStream);
01265         m_myCoutStream << "\n";
01266 
01267     } else {
01268         m_myCoutStream << "\n" << recString
01269                 << " Data and emulated FDL gtDecisionWordExtended different.\n";
01270         m_myCoutStream << "\n Data: ";
01271         fdlBlockData.printGtDecisionWordExtended(m_myCoutStream);
01272         m_myCoutStream << "\n Emul: ";
01273         fdlBlockEmul.printGtDecisionWordExtended(m_myCoutStream);
01274         m_myCoutStream << "\n";
01275 
01276         if (matchBxInEvent && validBxInEvent) {
01277             m_fdlDataEmul[histIndex][iRec]->Fill(8);
01278         } else {
01279             m_fdlDataEmul_Err[iRec]->Fill(8);
01280         }
01281 
01282     }
01283 
01284     // get  NoAlgo
01285     const boost::uint16_t noAlgoData = fdlBlockData.noAlgo();
01286     const boost::uint16_t noAlgoEmul = fdlBlockEmul.noAlgo();
01287 
01288     if (noAlgoData == noAlgoEmul) {
01289         m_myCoutStream << "\n" << recString
01290                 << " Data and emulated FDL noAlgo identical.";
01291         m_myCoutStream << "\n noAlgo() = " << noAlgoData;
01292         m_myCoutStream << "\n";
01293 
01294     } else {
01295         m_myCoutStream << "\n" << recString
01296                 << " Data and emulated FDL noAlgo different.";
01297         m_myCoutStream << "\n Data: noAlgo() = " << noAlgoData;
01298         m_myCoutStream << "\n Emul: noAlgo() = " << noAlgoEmul;
01299         m_myCoutStream << "\n";
01300 
01301         if (matchBxInEvent && validBxInEvent) {
01302             m_fdlDataEmul[histIndex][iRec]->Fill(9);
01303         } else {
01304             m_fdlDataEmul_Err[iRec]->Fill(9);
01305         }
01306 
01307     }
01308 
01309     // get  "Final OR" bits
01310     const boost::uint16_t finalORData = fdlBlockData.finalOR();
01311     const boost::uint16_t finalOREmul = fdlBlockEmul.finalOR();
01312 
01313     if (finalORData == finalOREmul) {
01314         m_myCoutStream << "\n" << recString
01315                 << " Data and emulated FDL finalOR identical.";
01316         m_myCoutStream << "\n finalOR() = " << std::hex << "0x" << std::setw(2)
01317                 << std::setfill('0') << finalORData << std::setfill(' ')
01318                 << std::dec;
01319         m_myCoutStream << "\n";
01320 
01321     } else {
01322         m_myCoutStream << "\n" << recString
01323                 << " Data and emulated FDL finalOR different.";
01324         m_myCoutStream << "\n Data: finalOR() = " << std::hex << "0x"
01325                 << std::setw(2) << std::setfill('0') << finalORData
01326                 << std::setfill(' ') << std::dec;
01327         m_myCoutStream << "\n Emul: finalOR() = " << std::hex << "0x"
01328                 << std::setw(2) << std::setfill('0') << finalOREmul
01329                 << std::setfill(' ') << std::dec;
01330         m_myCoutStream << "\n";
01331 
01332         if (matchBxInEvent && validBxInEvent) {
01333             m_fdlDataEmul[histIndex][iRec]->Fill(10);
01334         } else {
01335             m_fdlDataEmul_Err[iRec]->Fill(10);
01336         }
01337 
01338     }
01339 
01340     // get  "Final OR" for physics partition
01341     const int finalORPhysData = finalORData & (1 << PhysicsPartition);
01342     const int finalORPhysEmul = finalOREmul & (1 << PhysicsPartition);
01343 
01344     if (finalORPhysData == finalORPhysEmul) {
01345         m_myCoutStream << "\n" << recString
01346                 << " Data and emulated FDL finalOR for the physics partition identical.";
01347         m_myCoutStream << "\n finalOR() = " << finalORPhysData;
01348         m_myCoutStream << "\n";
01349 
01350     } else {
01351         m_myCoutStream << "\n" << recString
01352                 << " Data and emulated FDL finalOR for the physics partition  different.";
01353         m_myCoutStream << "\n Data: finalOR() = " << finalORPhysData;
01354         m_myCoutStream << "\n Emul: finalOR() = " << finalORPhysEmul;
01355         m_myCoutStream << "\n";
01356 
01357         if (matchBxInEvent && validBxInEvent) {
01358             m_fdlDataEmul[histIndex][iRec]->Fill(11);
01359         } else {
01360             m_fdlDataEmul_Err[iRec]->Fill(11);
01361         }
01362 
01363     }
01364 
01365     // get  local bunch cross number of the actual bx
01366     const boost::uint16_t localBxNrData = fdlBlockData.localBxNr();
01367     const boost::uint16_t localBxNrEmul = fdlBlockEmul.localBxNr();
01368 
01369     if (localBxNrData == localBxNrEmul) {
01370         m_myCoutStream << "\n" << recString
01371                 << " Data and emulated FDL localBxNr identical.";
01372         m_myCoutStream << "\n localBxNr() = " << localBxNrData;
01373         m_myCoutStream << "\n";
01374 
01375     } else {
01376         m_myCoutStream << "\n" << recString
01377                 << " Data and emulated FDL localBxNr different.";
01378         m_myCoutStream << "\n Data: localBxNr() = " << localBxNrData;
01379         m_myCoutStream << "\n Emul: localBxNr() = " << localBxNrEmul;
01380         m_myCoutStream << "\n";
01381 
01382         if (matchBxInEvent && validBxInEvent) {
01383             m_fdlDataEmul[histIndex][iRec]->Fill(12);
01384         } else {
01385             m_fdlDataEmul_Err[iRec]->Fill(12);
01386         }
01387 
01388     }
01389 
01390     edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
01391     m_myCoutStream.str("");
01392     m_myCoutStream.clear();
01393 
01394 }
01395 
01396 //compare the PSB board
01397 void L1GtHwValidation::comparePSB(const edm::Event& iEvent,
01398         const edm::EventSetup& evSetup, const L1GtPsbWord& psbBlockData,
01399         const L1GtPsbWord& psbBlockEmul) {
01400 
01401     if (psbBlockData == psbBlockEmul) {
01402         m_myCoutStream << "\nData and emulated PSB blocks: identical.\n";
01403         psbBlockData.print(m_myCoutStream);
01404 
01405     } else {
01406         m_myCoutStream << "\nData and emulated PSB blocks: different.\n";
01407 
01408         m_myCoutStream << "\nData: PSB block\n";
01409         psbBlockData.print(m_myCoutStream);
01410 
01411         m_myCoutStream << "\nEmul: PSB block\n";
01412         psbBlockEmul.print(m_myCoutStream);
01413 
01414     }
01415 
01416     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
01417 
01418     m_myCoutStream.str("");
01419     m_myCoutStream.clear();
01420 
01421     // get BoardId value
01422     const boost::uint16_t boardIdData = psbBlockData.boardId();
01423     const boost::uint16_t boardIdEmul = psbBlockEmul.boardId();
01424 
01425     if (boardIdData == boardIdEmul) {
01426         m_myCoutStream << "\nData and emulated PSB boardId identical.";
01427         m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
01428                 << std::setfill('0') << boardIdData << std::setfill(' ')
01429                 << std::dec;
01430         m_myCoutStream << "\n";
01431 
01432     } else {
01433         m_myCoutStream << "\nData and emulated PSB boardId different.";
01434         m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
01435                 << std::setw(4) << std::setfill('0') << boardIdData
01436                 << std::setfill(' ') << std::dec;
01437         m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
01438                 << std::setw(4) << std::setfill('0') << boardIdEmul
01439                 << std::setfill(' ') << std::dec;
01440         m_myCoutStream << "\n";
01441 
01442     }
01443 
01444     // get bunch cross in the GT event record
01445     const int bxInEventData = psbBlockData.bxInEvent();
01446     const int bxInEventEmul = psbBlockEmul.bxInEvent();
01447 
01448     if (bxInEventData == bxInEventEmul) {
01449         m_myCoutStream << "\nData and emulated PSB bxInEvent identical.";
01450         m_myCoutStream << "\n bxInEvent() = " << bxInEventData;
01451         m_myCoutStream << "\n";
01452 
01453     } else {
01454         m_myCoutStream << "\nData and emulated PSB bxInEvent different.";
01455         m_myCoutStream << "\n Data: bxInEvent() = " << bxInEventData;
01456         m_myCoutStream << "\n Emul: bxInEvent() = " << bxInEventEmul;
01457         m_myCoutStream << "\n";
01458 
01459     }
01460 
01461     // get BxNr - bunch cross number of the actual bx
01462     const boost::uint16_t bxNrData = psbBlockData.bxNr();
01463     const boost::uint16_t bxNrEmul = psbBlockEmul.bxNr();
01464 
01465     if (bxNrData == bxNrEmul) {
01466         m_myCoutStream << "\nData and emulated PSB bxNr identical.";
01467         m_myCoutStream << "\n bxNr() = " << bxNrData;
01468         m_myCoutStream << "\n";
01469 
01470     } else {
01471         m_myCoutStream << "\nData and emulated PSB bxNr different.";
01472         m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
01473         m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
01474         m_myCoutStream << "\n";
01475 
01476     }
01477 
01478     // get event number since last L1 reset generated in FDL
01479     const boost::uint32_t eventNrData = psbBlockData.eventNr();
01480     const boost::uint32_t eventNrEmul = psbBlockEmul.eventNr();
01481 
01482     if (eventNrData == eventNrEmul) {
01483         m_myCoutStream << "\nData and emulated PSB eventNr identical.";
01484         m_myCoutStream << "\n eventNr() = " << eventNrData;
01485         m_myCoutStream << "\n";
01486 
01487     } else {
01488         m_myCoutStream << "\nData and emulated PSB eventNr different.";
01489         m_myCoutStream << "\n Data: eventNr() = " << eventNrData;
01490         m_myCoutStream << "\n Emul: eventNr() = " << eventNrEmul;
01491         m_myCoutStream << "\n";
01492 
01493     }
01494 
01496     boost::uint16_t valData;
01497     boost::uint16_t valEmul;
01498 
01499     for (int iA = 0; iA < psbBlockData.NumberAData; ++iA) {
01500         valData = psbBlockData.aData(iA);
01501         valEmul = psbBlockEmul.aData(iA);
01502 
01503         if (valData == valEmul) {
01504             m_myCoutStream << "\nData and emulated PSB aData(" << iA
01505                     << ") identical.";
01506             m_myCoutStream << "\n aData(iA) = " << std::hex << "0x"
01507                     << std::setw(4) << std::setfill('0') << valData
01508                     << std::setfill(' ') << std::dec;
01509             m_myCoutStream << "\n";
01510 
01511         } else {
01512             m_myCoutStream << "\nData and emulated PSB aData(" << iA
01513                     << ") different.";
01514             m_myCoutStream << "\n Data: aData(iA) = " << std::hex << "0x"
01515                     << std::setw(4) << std::setfill('0') << valData
01516                     << std::setfill(' ') << std::dec;
01517             m_myCoutStream << "\n Emul: aData(iA) = " << std::hex << "0x"
01518                     << std::setw(4) << std::setfill('0') << valEmul
01519                     << std::setfill(' ') << std::dec;
01520             m_myCoutStream << "\n";
01521 
01522         }
01523 
01524     }
01525 
01527     for (int iB = 0; iB < psbBlockData.NumberBData; ++iB) {
01528         valData = psbBlockData.bData(iB);
01529         valEmul = psbBlockEmul.bData(iB);
01530 
01531         if (valData == valEmul) {
01532             m_myCoutStream << "\nData and emulated PSB bData(" << iB
01533                     << ") identical.";
01534             m_myCoutStream << "\n bData(iA) = " << std::hex << "0x"
01535                     << std::setw(4) << std::setfill('0') << valData
01536                     << std::setfill(' ') << std::dec;
01537             m_myCoutStream << "\n";
01538 
01539         } else {
01540             m_myCoutStream << "\nData and emulated PSB bData(" << iB
01541                     << ") different.";
01542             m_myCoutStream << "\n Data: bData(iA) = " << std::hex << "0x"
01543                     << std::setw(4) << std::setfill('0') << valData
01544                     << std::setfill(' ') << std::dec;
01545             m_myCoutStream << "\n Emul: bData(iA) = " << std::hex << "0x"
01546                     << std::setw(4) << std::setfill('0') << valEmul
01547                     << std::setfill(' ') << std::dec;
01548             m_myCoutStream << "\n";
01549 
01550         }
01551 
01552     }
01553 
01554     // get  local bunch cross number of the actual bx
01555     const boost::uint16_t localBxNrData = psbBlockData.localBxNr();
01556     const boost::uint16_t localBxNrEmul = psbBlockEmul.localBxNr();
01557 
01558     if (localBxNrData == localBxNrEmul) {
01559         m_myCoutStream << "\nData and emulated PSB localBxNr identical.";
01560         m_myCoutStream << "\n localBxNr() = " << localBxNrData;
01561         m_myCoutStream << "\n";
01562 
01563     } else {
01564         m_myCoutStream << "\nData and emulated PSB localBxNr different.";
01565         m_myCoutStream << "\n Data: localBxNr() = " << localBxNrData;
01566         m_myCoutStream << "\n Emul: localBxNr() = " << localBxNrEmul;
01567         m_myCoutStream << "\n";
01568 
01569     }
01570 
01571     edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
01572     m_myCoutStream.str("");
01573     m_myCoutStream.clear();
01574 
01575 }
01576 
01577 //compare the TCS board
01578 void L1GtHwValidation::compareTCS(const edm::Event& iEvent,
01579         const edm::EventSetup& evSetup, const L1TcsWord&, const L1TcsWord&) {
01580     // empty
01581 }
01582 
01583 //L1 GT DAQ record comparison
01584 void L1GtHwValidation::compareDaqRecord(const edm::Event& iEvent,
01585         const edm::EventSetup& evSetup) {
01586 
01587     // formal index for DAQ record 
01588     int iRec = 0;
01589 
01590     // reset the flags - they are used for DAQ recor only
01591     m_agree = true;
01592     m_dataOnly = false;
01593     m_emulOnly = false;
01594     m_dataOnlyMask = false;
01595     m_emulOnlyMask = false;
01596 
01597 
01598     // get the L1 GT hardware DAQ record L1GlobalTriggerReadoutRecord
01599     edm::Handle<L1GlobalTriggerReadoutRecord> gtReadoutRecordData;
01600     iEvent.getByLabel(m_l1GtDataDaqInputTag, gtReadoutRecordData);
01601 
01602     bool validData = false;
01603 
01604     if (!gtReadoutRecordData.isValid()) {
01605         m_nrDataEventError++;
01606     } else {
01607         validData = true;
01608     }
01609 
01610     // get the L1 GT emulator DAQ record L1GlobalTriggerReadoutRecord
01611     edm::Handle<L1GlobalTriggerReadoutRecord> gtReadoutRecordEmul;
01612     iEvent.getByLabel(m_l1GtEmulDaqInputTag, gtReadoutRecordEmul);
01613 
01614     bool validEmul = false;
01615 
01616     if (!gtReadoutRecordEmul.isValid()) {
01617         m_nrEmulEventError++;
01618     } else {
01619         validEmul = true;
01620     }
01621 
01622     if ((!validData) || (!validEmul)) {
01623         edm::LogWarning("L1GtHwValidation")
01624                 << "\n No valid product found: DAQ L1GlobalTriggerReadoutRecord"
01625                 << "\n     Data validity [1 = true; 0 = false]: " << validData
01626                 << "\n     Emulator validity: [1 = true; 0 = false]: "
01627                 << validEmul << "\n DAQ histograms will not be filled.\n"
01628                 << std::endl;
01629 
01630         return;
01631     }
01632 
01633     // compare GTFE
01634     const L1GtfeWord& gtfeBlockData = gtReadoutRecordData->gtfeWord();
01635     const L1GtfeWord& gtfeBlockEmul = gtReadoutRecordEmul->gtfeWord();
01636 
01637     compareGTFE(iEvent, evSetup, gtfeBlockData, gtfeBlockEmul, iRec);
01638 
01639     // FDL comparison
01640     const std::vector<L1GtFdlWord>& gtFdlVectorData =
01641             gtReadoutRecordData->gtFdlVector();
01642     const std::vector<L1GtFdlWord>& gtFdlVectorEmul =
01643             gtReadoutRecordEmul->gtFdlVector();
01644 
01645     int gtFdlVectorDataSize = gtFdlVectorData.size();
01646     int gtFdlVectorEmulSize = gtFdlVectorEmul.size();
01647 
01648     if (gtFdlVectorDataSize == gtFdlVectorEmulSize) {
01649         m_myCoutStream << "\nData and emulated FDL vector size: identical.\n";
01650         m_myCoutStream << "  Size: " << gtFdlVectorDataSize << std::endl;
01651 
01652         for (int iFdl = 0; iFdl < gtFdlVectorDataSize; ++iFdl) {
01653 
01654             const L1GtFdlWord& fdlBlockData = gtFdlVectorData[iFdl];
01655             const L1GtFdlWord& fdlBlockEmul = gtFdlVectorEmul[iFdl];
01656 
01657             compareFDL(iEvent, evSetup, fdlBlockData, fdlBlockEmul, iRec);
01658         }
01659     } else {
01660         m_myCoutStream << "\nData and emulated FDL vector size: different.\n";
01661         m_myCoutStream << "  Data: size = " << gtFdlVectorDataSize << std::endl;
01662         m_myCoutStream << "  Emul: size = " << gtFdlVectorEmulSize << std::endl;
01663 
01664     }
01665 
01666     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
01667 
01668     m_myCoutStream.str("");
01669     m_myCoutStream.clear();
01670 
01671     // PSB comparison
01672     const std::vector<L1GtPsbWord>& gtPsbVectorData =
01673             gtReadoutRecordData->gtPsbVector();
01674     const std::vector<L1GtPsbWord>& gtPsbVectorEmul =
01675             gtReadoutRecordEmul->gtPsbVector();
01676 
01677     int gtPsbVectorDataSize = gtPsbVectorData.size();
01678     int gtPsbVectorEmulSize = gtPsbVectorEmul.size();
01679 
01680     if (gtPsbVectorDataSize == gtPsbVectorEmulSize) {
01681         m_myCoutStream << "\nData and emulated PSB vector size: identical.\n";
01682         m_myCoutStream << "  Size: " << gtPsbVectorDataSize << std::endl;
01683     } else {
01684         m_myCoutStream << "\nData and emulated PSB vector size: different.\n";
01685         m_myCoutStream << "  Data: size = " << gtPsbVectorDataSize << std::endl;
01686         m_myCoutStream << "  Emul: size = " << gtPsbVectorEmulSize << std::endl;
01687 
01688     }
01689 
01690     // the order of PSB block in the gtPsbVector is different in emulator and in data
01691     // in emulator: all active PSB in one BxInEvent, ordered L1A-1, L1A, L1A+1
01692     // in unpacker: every PSB in all BxInEvent
01693     for (int iPsb = 0; iPsb < gtPsbVectorDataSize; ++iPsb) {
01694 
01695         const L1GtPsbWord& psbBlockData = gtPsbVectorData[iPsb];
01696         const boost::uint16_t boardIdData = psbBlockData.boardId();
01697         const int bxInEventData = psbBlockData.bxInEvent();
01698 
01699         // search the corresponding PSB in the emulated record using the 
01700         // BoardId and the BxInEvent  
01701 
01702         bool foundPSB = false;
01703 
01704         for (int iPsbF = 0; iPsbF < gtPsbVectorEmulSize; ++iPsbF) {
01705 
01706             const L1GtPsbWord& psbBlockEmul = gtPsbVectorEmul[iPsbF];
01707             const boost::uint16_t boardIdEmul = psbBlockEmul.boardId();
01708             const int bxInEventEmul = psbBlockEmul.bxInEvent();
01709 
01710             if ((boardIdEmul == boardIdData)
01711                     && (bxInEventData == bxInEventEmul)) {
01712 
01713                 foundPSB = true;
01714 
01715                 // compare the boards
01716                 comparePSB(iEvent, evSetup, psbBlockData, psbBlockEmul);
01717             }
01718 
01719         }
01720 
01721         if (!foundPSB) {
01722             m_myCoutStream << "\nNo emulated PSB with boardId() = " << std::hex
01723                     << "0x" << std::setw(4) << std::setfill('0') << boardIdData
01724                     << std::setfill(' ') << std::dec << " and BxInEvent = "
01725                     << bxInEventData << " was found";
01726 
01727         }
01728 
01729     }
01730 
01731     edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
01732 
01733     m_myCoutStream.str("");
01734     m_myCoutStream.clear();
01735 
01736     // fill the m_gtErrorFlag histogram (only for L1 GT DAQ record)
01737 
01738 
01739     if (m_dbe) {
01740         m_dbe->setCurrentFolder(m_dirName);
01741     }
01742 
01743 
01744     if (m_agree) {
01745         m_gtErrorFlag->Fill(0.0001);
01746     }
01747 
01748     if (m_dataOnly || m_dataOnlyMask) {
01749         m_gtErrorFlag->Fill(3.0001);
01750     }
01751 
01752     if (m_emulOnly || m_emulOnlyMask) {
01753         m_gtErrorFlag->Fill(4.0001);
01754     }
01755 
01756 }
01757 
01758 // L1 GT EVM record comparison
01759 void L1GtHwValidation::compareEvmRecord(const edm::Event& iEvent,
01760         const edm::EventSetup& evSetup) {
01761 
01762     // formal index for EVM record
01763     int iRec = 1;
01764 
01765     // get the L1 GT hardware EVM record L1GlobalTriggerEvmReadoutRecord
01766     edm::Handle<L1GlobalTriggerEvmReadoutRecord> gtReadoutRecordData;
01767     iEvent.getByLabel(m_l1GtDataEvmInputTag, gtReadoutRecordData);
01768 
01769     bool validData = false;
01770 
01771     if (!gtReadoutRecordData.isValid()) {
01772         m_nrDataEventError++;
01773     } else {
01774         validData = true;
01775     }
01776 
01777     // get the L1 GT emulator EVM record L1GlobalTriggerEvmReadoutRecord
01778     edm::Handle<L1GlobalTriggerEvmReadoutRecord> gtReadoutRecordEmul;
01779     iEvent.getByLabel(m_l1GtEmulEvmInputTag, gtReadoutRecordEmul);
01780 
01781     bool validEmul = false;
01782 
01783     if (!gtReadoutRecordEmul.isValid()) {
01784         m_nrEmulEventError++;
01785     } else {
01786         validEmul = true;
01787     }
01788 
01789     if ((!validData) || (!validEmul)) {
01790         edm::LogWarning("L1GtHwValidation")
01791                 << "\n No valid product found: EVM L1GlobalTriggerEvmReadoutRecord"
01792                 << "\n     Data validity [1 = true; 0 = false]: " << validData
01793                 << "\n     Emulator validity: [1 = true; 0 = false]: "
01794                 << validEmul << "\n EVM histograms will not be filled.\n"
01795                 << std::endl;
01796 
01797         return;
01798     }
01799 
01800     // compare GTFE
01801     const L1GtfeWord& gtfeBlockData = gtReadoutRecordData->gtfeWord();
01802     const L1GtfeWord& gtfeBlockEmul = gtReadoutRecordEmul->gtfeWord();
01803 
01804     compareGTFE(iEvent, evSetup, gtfeBlockData, gtfeBlockEmul, iRec);
01805 
01806     // FDL comparison
01807     const std::vector<L1GtFdlWord>& gtFdlVectorData =
01808             gtReadoutRecordData->gtFdlVector();
01809     const std::vector<L1GtFdlWord>& gtFdlVectorEmul =
01810             gtReadoutRecordEmul->gtFdlVector();
01811 
01812     int gtFdlVectorDataSize = gtFdlVectorData.size();
01813     int gtFdlVectorEmulSize = gtFdlVectorEmul.size();
01814 
01815     if (gtFdlVectorDataSize == gtFdlVectorEmulSize) {
01816         m_myCoutStream << "\nData and emulated FDL vector size: identical.\n";
01817         m_myCoutStream << "  Size: " << gtFdlVectorDataSize << std::endl;
01818 
01819         for (int iFdl = 0; iFdl < gtFdlVectorDataSize; ++iFdl) {
01820 
01821             const L1GtFdlWord& fdlBlockData = gtFdlVectorData[iFdl];
01822             const L1GtFdlWord& fdlBlockEmul = gtFdlVectorEmul[iFdl];
01823 
01824             compareFDL(iEvent, evSetup, fdlBlockData, fdlBlockEmul, iRec);
01825         }
01826     } else {
01827         m_myCoutStream << "\nData and emulated FDL vector size: different.\n";
01828         m_myCoutStream << "  Data: size = " << gtFdlVectorDataSize << std::endl;
01829         m_myCoutStream << "  Emul: size = " << gtFdlVectorEmulSize << std::endl;
01830 
01831     }
01832 
01833     // FIXME compare TCS
01834 
01835     LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
01836 
01837     m_myCoutStream.str("");
01838     m_myCoutStream.clear();
01839 
01840     edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
01841 
01842     m_myCoutStream.str("");
01843     m_myCoutStream.clear();
01844 
01845 }
01846 
01847 // compare the GCT collections obtained from L1 GT PSB with the input 
01848 // GCT collections
01849 void L1GtHwValidation::compareGt_Gct(const edm::Event& iEvent,
01850         const edm::EventSetup&) {
01851 
01852     // FIXME
01853 
01854 }
01855 
01856 // analyze each event: event loop
01857 void L1GtHwValidation::analyze(const edm::Event& iEvent,
01858         const edm::EventSetup& evSetup) {
01859 
01860     ++m_nrEvJob;
01861     ++m_nrEvRun;
01862 
01863     // L1 GT DAQ record comparison
01864     compareDaqRecord(iEvent, evSetup);
01865 
01866     // L1 GT EVM record comparison
01867     compareEvmRecord(iEvent, evSetup);
01868 
01869     // GCT collections from L1 GT PSB versus unpacked GCT 
01870     compareGt_Gct(iEvent, evSetup);
01871 
01872 }
01873 
01874 // book all histograms for the module
01875 void L1GtHwValidation::bookHistograms() {
01876 
01877     // histograms
01878 
01879     const unsigned int numberTechTriggers =
01880             L1GlobalTriggerReadoutSetup::NumberTechnicalTriggers;
01881 
01882     const unsigned int numberAlgoTriggers =
01883             L1GlobalTriggerReadoutSetup::NumberPhysTriggers;
01884 
01885     for (int iRec = 0; iRec < NumberOfGtRecords; ++iRec) {
01886 
01887         std::string recString;
01888         if (iRec == 0) {
01889             recString = "Daq_";
01890             if (m_dbe) {
01891                 m_dbe->setCurrentFolder(m_dirName + "/DAQ/");
01892             }
01893 
01894         } else {
01895             recString = "Evm_";
01896             if (m_dbe) {
01897                 m_dbe->setCurrentFolder(m_dirName + "/EVM/");
01898             }
01899         }
01900 
01901         std::string hName;
01902         const char* histName;
01903 
01904         hName = recString + "gtfeDataEmul";
01905         histName = hName.c_str();
01906 
01907         // GTFE histograms
01908         m_gtfeDataEmul[iRec] = m_dbe->book1D(histName,
01909                 "GTFE data vs emul mismatch", 8, 0., 7.);
01910         m_gtfeDataEmul[iRec]->setBinLabel(1, "BoardId", 1);
01911         m_gtfeDataEmul[iRec]->setBinLabel(2, "RecordLength1", 1);
01912         m_gtfeDataEmul[iRec]->setBinLabel(3, "RecordLength0", 1);
01913         m_gtfeDataEmul[iRec]->setBinLabel(4, "BxNr", 1);
01914         m_gtfeDataEmul[iRec]->setBinLabel(5, "SetupVersion", 1);
01915         m_gtfeDataEmul[iRec]->setBinLabel(6, "DaqActiveBoards", 1);
01916         m_gtfeDataEmul[iRec]->setBinLabel(7, "AltNrBxBoard", 1);
01917         m_gtfeDataEmul[iRec]->setBinLabel(8, "TotalTriggerNr", 1);
01918 
01919         // FDL histograms
01920 
01921         for (int iHist = 0; iHist < TotalBxInEvent; ++iHist) {
01922 
01923             // convert [0, TotalBxInEvent] to [-X, +X] and add to histogram name 
01924             int iIndex = iHist - ((TotalBxInEvent + 1) / 2 - 1);
01925             int hIndex = (iIndex + 16) % 16;
01926 
01927             std::stringstream ss;
01928             std::string str;
01929             ss << std::uppercase << std::hex << hIndex;
01930             ss >> str;
01931 
01932             if (iRec == 0) {
01933                 if (m_dbe) {
01934                     m_dbe->setCurrentFolder(m_dirName + "/DAQ/BxInEvent_" + str);
01935                 }
01936 
01937             } else {
01938                 if (m_dbe) {
01939                     m_dbe->setCurrentFolder(m_dirName + "/EVM/BxInEvent_" + str);
01940                 }
01941             }
01942 
01943             hName = recString + "FdlDataEmul_" + str;
01944             histName = hName.c_str();
01945 
01946             std::string hTitle = "FDL data vs emul mismatch for BxInEvent = "
01947                     + str;
01948             const char* histTitle = hTitle.c_str();
01949 
01950             //
01951 
01952             m_fdlDataEmul[iHist][iRec] = m_dbe->book1D(histName, histTitle, 13,
01953                     0., 13.);
01954             m_fdlDataEmul[iHist][iRec]->setBinLabel(1, "BoardId", 1);
01955             m_fdlDataEmul[iHist][iRec]->setBinLabel(2, "BxInEvent", 1);
01956             m_fdlDataEmul[iHist][iRec]->setBinLabel(3, "BxNr", 1);
01957             m_fdlDataEmul[iHist][iRec]->setBinLabel(4, "EventNr", 1);
01958             m_fdlDataEmul[iHist][iRec]->setBinLabel(5, "TechTrigger", 1);
01959             m_fdlDataEmul[iHist][iRec]->setBinLabel(6, "TechTriggerMask", 1);
01960             m_fdlDataEmul[iHist][iRec]->setBinLabel(7, "AlgoTrigger", 1);
01961             m_fdlDataEmul[iHist][iRec]->setBinLabel(8, "AlgoTriggerMask", 1);
01962             m_fdlDataEmul[iHist][iRec]->setBinLabel(9, "AlgoExtend", 1);
01963             m_fdlDataEmul[iHist][iRec]->setBinLabel(10, "NoAlgo", 1);
01964             m_fdlDataEmul[iHist][iRec]->setBinLabel(11, "FinalORAllParts", 1);
01965             m_fdlDataEmul[iHist][iRec]->setBinLabel(12, "FinalORPhysPart", 1);
01966             m_fdlDataEmul[iHist][iRec]->setBinLabel(13, "LocalBxNr", 1);
01967 
01968             // algorithm decision
01969             //   data
01970             hName = recString + "Data_AlgoDecision_" + str;
01971             histName = hName.c_str();
01972 
01973             hTitle = "Data: algorithm decision word for BxInEvent = " + str;
01974             histTitle = hTitle.c_str();
01975 
01976             m_fdlDataAlgoDecision[iHist][iRec] = m_dbe->book1D(histName,
01977                     histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
01978 
01979             //   emul
01980             hName = recString + "Emul_AlgoDecision_" + str;
01981             histName = hName.c_str();
01982 
01983             hTitle = "Emul: algorithm decision word for BxInEvent = " + str;
01984             histTitle = hTitle.c_str();
01985 
01986             m_fdlEmulAlgoDecision[iHist][iRec] = m_dbe->book1D(histName,
01987                     histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
01988 
01989             // algorithm decision for prescaled algorithms
01990             //   data
01991             hName = recString + "Data_AlgoDecision_Prescaled_" + str;
01992             histName = hName.c_str();
01993 
01994             hTitle
01995                     = "Data: prescaled algorithms: algorithm decision for BxInEvent = "
01996                             + str;
01997             histTitle = hTitle.c_str();
01998 
01999             m_fdlDataAlgoDecisionPrescaled[iHist][iRec] = m_dbe->book1D(
02000                     histName, histTitle, numberAlgoTriggers, 0.,
02001                     numberAlgoTriggers);
02002 
02003             //   emul
02004             hName = recString + "Emul_AlgoDecision_Prescaled_" + str;
02005             histName = hName.c_str();
02006 
02007             hTitle
02008                     = "Emul: prescaled algorithms: algorithm decision for BxInEvent = "
02009                             + str;
02010             histTitle = hTitle.c_str();
02011 
02012             m_fdlEmulAlgoDecisionPrescaled[iHist][iRec] = m_dbe->book1D(
02013                     histName, histTitle, numberAlgoTriggers, 0.,
02014                     numberAlgoTriggers);
02015 
02016             // algorithm decision for unprescaled algorithms
02017             //   data
02018             hName = recString + "Data_AlgoDecision_Unprescaled_" + str;
02019             histName = hName.c_str();
02020 
02021             hTitle
02022                     = "Data: unprescaled algorithms: algorithm decision for BxInEvent = "
02023                             + str;
02024             histTitle = hTitle.c_str();
02025 
02026             m_fdlDataAlgoDecisionUnprescaled[iHist][iRec] = m_dbe->book1D(
02027                     histName, histTitle, numberAlgoTriggers, 0.,
02028                     numberAlgoTriggers);
02029 
02030             //   emul
02031             hName = recString + "Emul_AlgoDecision_Unprescaled_" + str;
02032             histName = hName.c_str();
02033 
02034             hTitle
02035                     = "Emul: unprescaled algorithms: algorithm decision for BxInEvent = "
02036                             + str;
02037             histTitle = hTitle.c_str();
02038 
02039             m_fdlEmulAlgoDecisionUnprescaled[iHist][iRec] = m_dbe->book1D(
02040                     histName, histTitle, numberAlgoTriggers, 0.,
02041                     numberAlgoTriggers);
02042 
02043             // algorithm decision after masking (partition physics)
02044             //   data
02045             hName = recString + "Data_AlgoDecisionAfterMask_" + str;
02046             histName = hName.c_str();
02047 
02048             hTitle
02049                     = "Data, physics partition: algorithm decision word after mask for BxInEvent = "
02050                             + str;
02051             histTitle = hTitle.c_str();
02052 
02053             m_fdlDataAlgoDecisionMask[iHist][iRec] = m_dbe->book1D(histName,
02054                     histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
02055 
02056             //   emul
02057             hName = recString + "Emul_AlgoDecisionAfterMask_" + str;
02058             histName = hName.c_str();
02059 
02060             hTitle
02061                     = "Emul, physics partition: algorithm decision word after mask for BxInEvent =  "
02062                             + str;
02063             histTitle = hTitle.c_str();
02064 
02065             m_fdlEmulAlgoDecisionMask[iHist][iRec] = m_dbe->book1D(histName,
02066                     histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
02067 
02068             //
02069             hName = recString + "DataEmul_AlgoDecision_" + str;
02070             histName = hName.c_str();
02071 
02072             hTitle
02073                     = "Data vs emul: non-matching algorithm decision word for BxInEvent = "
02074                             + str;
02075             histTitle = hTitle.c_str();
02076 
02077             m_fdlDataEmulAlgoDecision[iHist][iRec] = m_dbe->book1D(histName,
02078                     histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
02079 
02080             //
02081             hName = recString + "DataEmul_AlgoDecision_Prescaled_" + str;
02082             histName = hName.c_str();
02083 
02084             hTitle
02085                     = "Data vs emul: prescaled algorithms with non-matching decision for BxInEvent = "
02086                             + str;
02087             histTitle = hTitle.c_str();
02088 
02089             m_fdlDataEmulAlgoDecisionPrescaled[iHist][iRec] = m_dbe->book1D(
02090                     histName, histTitle, numberAlgoTriggers, 0.,
02091                     numberAlgoTriggers);
02092 
02093             //
02094             hName = recString + "DataEmul_AlgoDecision_Unprescaled_" + str;
02095             histName = hName.c_str();
02096 
02097             hTitle
02098                     = "Data vs emul: unprescaled algorithms with non-matching decision for BxInEvent = "
02099                             + str;
02100             histTitle = hTitle.c_str();
02101 
02102             m_fdlDataEmulAlgoDecisionUnprescaled[iHist][iRec] = m_dbe->book1D(
02103                     histName, histTitle, numberAlgoTriggers, 0.,
02104                     numberAlgoTriggers);
02105 
02106             //
02107             hName = recString + "DataEmul_AlgoDecision_Unprescaled_Allowed_" + str;
02108             histName = hName.c_str();
02109 
02110             hTitle
02111                     = "Data vs emul: unprescaled algorithms not excluded with non-matching decision for BxInEvent = "
02112                             + str;
02113             histTitle = hTitle.c_str();
02114 
02115             m_fdlDataEmulAlgoDecisionUnprescaledAllowed[iHist][iRec] = m_dbe->book1D(
02116                     histName, histTitle, numberAlgoTriggers, 0.,
02117                     numberAlgoTriggers);
02118 
02119             //
02120             hName = recString + "Data_AlgoDecision_NoMatch_" + str;
02121             histName = hName.c_str();
02122 
02123             hTitle
02124                     = "Data: algorithm decision for non-matching cases for BxInEvent = "
02125                             + str;
02126             histTitle = hTitle.c_str();
02127 
02128             m_fdlDataAlgoDecision_NoMatch[iHist][iRec] = m_dbe->book1D(
02129                     histName, histTitle, numberAlgoTriggers, 0.,
02130                     numberAlgoTriggers);
02131 
02132             //
02133             hName = recString + "Emul_AlgoDecision_NoMatch_" + str;
02134             histName = hName.c_str();
02135 
02136             hTitle
02137                     = "Emul: algorithm decision for non-matching cases for BxInEvent = "
02138                             + str;
02139             histTitle = hTitle.c_str();
02140 
02141             m_fdlEmulAlgoDecision_NoMatch[iHist][iRec] = m_dbe->book1D(
02142                     histName, histTitle, numberAlgoTriggers, 0.,
02143                     numberAlgoTriggers);
02144 
02145             // prescaled algorithms
02146             hName = recString + "Data_AlgoDecision_Prescaled_NoMatch_" + str;
02147             histName = hName.c_str();
02148 
02149             hTitle
02150                     = "Data: prescaled algorithms: non-matching algorithm decision for BxInEvent = "
02151                             + str;
02152             histTitle = hTitle.c_str();
02153 
02154             m_fdlDataAlgoDecisionPrescaled_NoMatch[iHist][iRec]
02155                     = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
02156                             0., numberAlgoTriggers);
02157 
02158             //
02159             hName = recString + "Emul_AlgoDecision_Prescaled_NoMatch_" + str;
02160             histName = hName.c_str();
02161 
02162             hTitle
02163                     = "Emul: prescaled algorithms: non-matching algorithm decision for BxInEvent = "
02164                             + str;
02165             histTitle = hTitle.c_str();
02166 
02167             m_fdlEmulAlgoDecisionPrescaled_NoMatch[iHist][iRec]
02168                     = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
02169                             0., numberAlgoTriggers);
02170 
02171 
02172             // unprescaled algorithms - non-matching
02173             hName = recString + "Data_AlgoDecision_Unprescaled_NoMatch_" + str;
02174             histName = hName.c_str();
02175 
02176             hTitle
02177                     = "Data: unprescaled algorithms: non-matching algorithm decision for BxInEvent = "
02178                             + str;
02179             histTitle = hTitle.c_str();
02180 
02181             m_fdlDataAlgoDecisionUnprescaled_NoMatch[iHist][iRec]
02182                     = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
02183                             0., numberAlgoTriggers);
02184 
02185             //
02186             hName = recString + "Emul_AlgoDecision_Unprescaled_NoMatch_" + str;
02187             histName = hName.c_str();
02188 
02189             hTitle
02190                     = "Emul: unprescaled algorithms: non-matching algorithm decision for BxInEvent = "
02191                             + str;
02192             histTitle = hTitle.c_str();
02193 
02194             m_fdlEmulAlgoDecisionUnprescaled_NoMatch[iHist][iRec]
02195                     = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
02196                             0., numberAlgoTriggers);
02197 
02198 
02199 
02200             //
02201             hName = recString + "Data_AlgoDecisionMask_NoMatch_" + str;
02202             histName = hName.c_str();
02203 
02204             hTitle
02205                     = "Data: algorithm decision for non-matching cases after mask for BxInEvent = "
02206                             + str;
02207             histTitle = hTitle.c_str();
02208 
02209             m_fdlDataAlgoDecisionMask_NoMatch[iHist][iRec] = m_dbe->book1D(
02210                     histName, histTitle, numberAlgoTriggers, 0.,
02211                     numberAlgoTriggers);
02212 
02213             //
02214             hName = recString + "Emul_AlgoDecisionMask_NoMatch_" + str;
02215             histName = hName.c_str();
02216 
02217             hTitle
02218                     = "Emul: algorithm decision for non-matching cases after mask for BxInEvent = "
02219                             + str;
02220             histTitle = hTitle.c_str();
02221 
02222             m_fdlEmulAlgoDecisionMask_NoMatch[iHist][iRec] = m_dbe->book1D(
02223                     histName, histTitle, numberAlgoTriggers, 0.,
02224                     numberAlgoTriggers);
02225 
02226             // prescaled algorithms
02227             hName = recString + "Data_AlgoDecisionMask_Prescaled_NoMatch_" + str;
02228             histName = hName.c_str();
02229 
02230             hTitle
02231                     = "Data: prescaled algorithms: non-matching algorithm decision after mask for BxInEvent = "
02232                             + str;
02233             histTitle = hTitle.c_str();
02234 
02235             m_fdlDataAlgoDecisionPrescaledMask_NoMatch[iHist][iRec]
02236                     = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
02237                             0., numberAlgoTriggers);
02238 
02239             //
02240             hName = recString + "Emul_AlgoDecision_PrescaledMask_NoMatch_" + str;
02241             histName = hName.c_str();
02242 
02243             hTitle
02244                     = "Emul: prescaled algorithms: non-matching algorithm decision after mask for BxInEvent = "
02245                             + str;
02246             histTitle = hTitle.c_str();
02247 
02248             m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[iHist][iRec]
02249                     = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
02250                             0., numberAlgoTriggers);
02251 
02252 
02253             // unprescaled algorithms - non-matching
02254             hName = recString + "Data_AlgoDecision_UnprescaledMask_NoMatch_" + str;
02255             histName = hName.c_str();
02256 
02257             hTitle
02258                     = "Data: unprescaled algorithms: non-matching algorithm decision after mask for BxInEvent = "
02259                             + str;
02260             histTitle = hTitle.c_str();
02261 
02262             m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[iHist][iRec]
02263                     = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
02264                             0., numberAlgoTriggers);
02265 
02266             //
02267             hName = recString + "Emul_AlgoDecision_UnprescaledMask_NoMatch_" + str;
02268             histName = hName.c_str();
02269 
02270             hTitle
02271                     = "Emul: unprescaled algorithms: non-matching algorithm decision after mask for BxInEvent = "
02272                             + str;
02273             histTitle = hTitle.c_str();
02274 
02275             m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[iHist][iRec]
02276                     = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
02277                             0., numberAlgoTriggers);
02278 
02279 
02280 
02281             // 
02282             hName = recString + "DataEmul_AlgoDecisionAfterMask_" + str;
02283             histName = hName.c_str();
02284 
02285             hTitle
02286                     = "Data vs emul, physics partition: non-matching algorithm decision word after mask for BxInEvent = "
02287                             + str;
02288             histTitle = hTitle.c_str();
02289 
02290             m_fdlDataEmulAlgoDecisionMask[iHist][iRec] = m_dbe->book1D(
02291                     histName, histTitle, numberAlgoTriggers, 0.,
02292                     numberAlgoTriggers);
02293 
02294             // technical trigger decision 
02295             //   data
02296             hName = recString + "Data_TechDecision_" + str;
02297             histName = hName.c_str();
02298 
02299             hTitle = "Data technical trigger decision word for BxInEvent = "
02300                     + str;
02301             histTitle = hTitle.c_str();
02302 
02303             m_fdlDataTechDecision[iHist][iRec] = m_dbe->book1D(histName,
02304                     histTitle, numberTechTriggers, 0., numberTechTriggers);
02305 
02306             //   emul
02307             hName = recString + "Emul_TechDecision_" + str;
02308             histName = hName.c_str();
02309 
02310             hTitle = "Emul: technical trigger decision word for BxInEvent = "
02311                     + str;
02312             histTitle = hTitle.c_str();
02313 
02314             m_fdlEmulTechDecision[iHist][iRec] = m_dbe->book1D(histName,
02315                     histTitle, numberTechTriggers, 0., numberTechTriggers);
02316 
02317             // technical trigger decision after masking (partition physics)
02318             hName = recString + "Data_TechDecisionAfterMask_" + str;
02319             histName = hName.c_str();
02320 
02321             hTitle
02322                     = "Data technical trigger decision word after mask for BxInEvent = "
02323                             + str;
02324             histTitle = hTitle.c_str();
02325 
02326             m_fdlDataTechDecisionMask[iHist][iRec] = m_dbe->book1D(histName,
02327                     histTitle, numberTechTriggers, 0., numberTechTriggers);
02328 
02329             //
02330             hName = recString + "Emul_TechDecisionAfterMask_" + str;
02331             histName = hName.c_str();
02332 
02333             hTitle
02334                     = "Emul: technical trigger decision word after mask for BxInEvent = "
02335                             + str;
02336             histTitle = hTitle.c_str();
02337 
02338             m_fdlEmulTechDecisionMask[iHist][iRec] = m_dbe->book1D(histName,
02339                     histTitle, numberTechTriggers, 0., numberTechTriggers);
02340 
02341             //
02342             hName = recString + "DataEmul_TechDecision_" + str;
02343             histName = hName.c_str();
02344 
02345             hTitle
02346                     = "Data vs emul: non-matching technical trigger decision word for BxInEvent = "
02347                             + str;
02348             histTitle = hTitle.c_str();
02349 
02350             m_fdlDataEmulTechDecision[iHist][iRec] = m_dbe->book1D(histName,
02351                     histTitle, numberTechTriggers, 0., numberTechTriggers);
02352 
02353             hName = recString + "DataEmul_TechDecisionAfterMask_" + str;
02354             histName = hName.c_str();
02355 
02356             hTitle
02357                     = "Data vs emul: non-matching technical trigger decision word after mask for BxInEvent = "
02358                             + str;
02359             histTitle = hTitle.c_str();
02360 
02361             m_fdlDataEmulTechDecisionMask[iHist][iRec] = m_dbe->book1D(
02362                     histName, histTitle, numberTechTriggers, 0.,
02363                     numberTechTriggers);
02364 
02365         }
02366 
02367         if (iRec == 0) {
02368             if (m_dbe) {
02369                 m_dbe->setCurrentFolder(m_dirName + "/DAQ/");
02370             }
02371 
02372         } else {
02373             if (m_dbe) {
02374                 m_dbe->setCurrentFolder(m_dirName + "/EVM/");
02375             }
02376         }
02377 
02378         hName = recString + "FdlDataEmul_Err";
02379         histName = hName.c_str();
02380 
02381         m_fdlDataEmul_Err[iRec]
02382                 = m_dbe->book1D(
02383                         histName,
02384                         "FDL data vs emul mismatch for non-matching BxInEvent in FDL payload",
02385                         13, 0., 13.);
02386         m_fdlDataEmul_Err[iRec]->setBinLabel(1, "BoardId", 1);
02387         m_fdlDataEmul_Err[iRec]->setBinLabel(2, "BxInEvent", 1);
02388         m_fdlDataEmul_Err[iRec]->setBinLabel(3, "BxNr", 1);
02389         m_fdlDataEmul_Err[iRec]->setBinLabel(4, "EventNr", 1);
02390         m_fdlDataEmul_Err[iRec]->setBinLabel(5, "TechTrigger", 1);
02391         m_fdlDataEmul_Err[iRec]->setBinLabel(6, "TechTriggerMask", 1);
02392         m_fdlDataEmul_Err[iRec]->setBinLabel(7, "AlgoTrigger", 1);
02393         m_fdlDataEmul_Err[iRec]->setBinLabel(8, "AlgoTriggerMask", 1);
02394         m_fdlDataEmul_Err[iRec]->setBinLabel(9, "AlgoExtend", 1);
02395         m_fdlDataEmul_Err[iRec]->setBinLabel(10, "NoAlgo", 1);
02396         m_fdlDataEmul_Err[iRec]->setBinLabel(11, "FinalORAllParts", 1);
02397         m_fdlDataEmul_Err[iRec]->setBinLabel(12, "FinalORPhysPart", 1);
02398         m_fdlDataEmul_Err[iRec]->setBinLabel(13, "LocalBxNr", 1);
02399 
02400         hName = recString + "FdlDataAlgoDecision_Err";
02401         histName = hName.c_str();
02402 
02403         m_fdlDataAlgoDecision_Err[iRec]
02404                 = m_dbe->book1D(
02405                         histName,
02406                         "Data: algorithm trigger decision word, non-matching BxInEvent",
02407                         numberAlgoTriggers, 0., numberAlgoTriggers);
02408 
02409         //
02410         hName = recString + "Emul_AlgoDecision_Err";
02411         histName = hName.c_str();
02412 
02413         m_fdlEmulAlgoDecision_Err[iRec]
02414                 = m_dbe->book1D(
02415                         histName,
02416                         "Emul: algorithm trigger decision word, non-matching BxInEvent",
02417                         numberAlgoTriggers, 0., numberAlgoTriggers);
02418 
02419         hName = recString + "DataEmul_AlgoDecision_Err";
02420         histName = hName.c_str();
02421 
02422         m_fdlDataEmulAlgoDecision_Err[iRec]
02423                 = m_dbe->book1D(
02424                         histName,
02425                         "Data vs emul: algorithm trigger decision word, non-matching BxInEvent",
02426                         numberAlgoTriggers, 0., numberAlgoTriggers);
02427 
02428         //
02429         hName = recString + "Data_TechDecision_Err";
02430         histName = hName.c_str();
02431 
02432         m_fdlDataTechDecision_Err[iRec]
02433                 = m_dbe->book1D(
02434                         histName,
02435                         "Data: technical trigger decision word, non-matching BxInEvent",
02436                         numberTechTriggers, 0., numberTechTriggers);
02437 
02438         hName = recString + "Emul_TechDecision_Err";
02439         histName = hName.c_str();
02440 
02441         m_fdlEmulTechDecision_Err[iRec]
02442                 = m_dbe->book1D(
02443                         histName,
02444                         "Emul: technical trigger decision word, non-matching BxInEvent",
02445                         numberTechTriggers, 0., numberTechTriggers);
02446 
02447         hName = recString + "DataEmul_TechDecision_Err";
02448         histName = hName.c_str();
02449 
02450         m_fdlDataEmulTechDecision_Err[iRec]
02451                 = m_dbe->book1D(
02452                         histName,
02453                         "Data vs emul: technical trigger decision word, non-matching BxInEvent",
02454                         numberTechTriggers, 0., numberTechTriggers);
02455 
02456     }
02457 
02458     if (m_dbe) {
02459         m_dbe->setCurrentFolder(m_dirName);
02460     }
02461 
02462     //
02463     m_excludedAlgorithmsAgreement = m_dbe->book1D(
02464             "ExcludedAlgorithmsFromAgreement",
02465             "Algorithms excluded from data versus emulator agreement flag",
02466             numberAlgoTriggers, 0., numberAlgoTriggers);
02467 
02468     //
02469 
02470     m_gtErrorFlag = m_dbe->book1D("GTErrorFlag",
02471             "L1 GT error flag for data versus emulator comparison", 5, 0., 5);
02472 
02473     m_gtErrorFlag->setBinLabel(1, "Agree", 1);
02474     m_gtErrorFlag->setBinLabel(2, "", 1);
02475     m_gtErrorFlag->setBinLabel(3, "", 1);
02476     m_gtErrorFlag->setBinLabel(4, "Data only", 1);
02477     m_gtErrorFlag->setBinLabel(5, "Emul only", 1);
02478 
02479 
02480 }
02481 
02482 bool L1GtHwValidation::matchCondCategory(
02483         const L1GtConditionCategory& conditionCategory,
02484         const L1GtConditionCategory& excludedCategory) {
02485 
02486     bool matchValue = false;
02487 
02488     if (excludedCategory == CondNull) {
02489         matchValue = true;
02490     } else {
02491         if (conditionCategory == excludedCategory) {
02492             matchValue = true;
02493         }
02494     }
02495 
02496     return matchValue;
02497 }
02498 
02499 
02500 bool L1GtHwValidation::matchCondType(const L1GtConditionType& conditionType,
02501         const L1GtConditionType& excludedType) {
02502 
02503     bool matchValue = false;
02504 
02505     if (excludedType == TypeNull) {
02506         matchValue = true;
02507     } else {
02508         if (conditionType == excludedType) {
02509             matchValue = true;
02510         }
02511     }
02512 
02513     return matchValue;
02514 }
02515 
02516 
02517 bool L1GtHwValidation::matchCondL1GtObject(
02518         const std::vector<L1GtObject>& condObjects,
02519         const L1GtObject& excludedObject) {
02520 
02521     bool matchValue = false;
02522 
02523     if (excludedObject == ObjNull) {
02524 
02525         matchValue = true;
02526 
02527     } else {
02528 
02529         for (std::vector<L1GtObject>::const_iterator itCondObj =
02530                 condObjects.begin(); itCondObj != condObjects.end(); ++itCondObj) {
02531 
02532             if ((*itCondObj) == excludedObject) {
02533 
02534                 matchValue = true;
02535 
02536             }
02537         }
02538     }
02539 
02540     return matchValue;
02541 
02542 }
02543 
02544 
02545 void L1GtHwValidation::excludedAlgoList() {
02546 
02547 
02548     const AlgorithmMap& algorithmMap = m_l1GtMenu->gtAlgorithmMap();
02549     (const_cast<L1GtTriggerMenu*> (m_l1GtMenu))->buildGtConditionMap(); //...ugly
02550 
02551     for (CItAlgo itAlgo = algorithmMap.begin(); itAlgo != algorithmMap.end(); itAlgo++) {
02552 
02553         const std::string& algName = itAlgo->first;
02554         const int algBitNumber = (itAlgo->second).algoBitNumber();
02555         const int chipNr = (itAlgo->second).algoChipNumber();
02556 
02557         const ConditionMap& conditionMap = (m_l1GtMenu->gtConditionMap()).at(
02558                 chipNr);
02559 
02560         const std::vector<L1GtLogicParser::TokenRPN>& aRpnVector =
02561                 (itAlgo->second).algoRpnVector();
02562         size_t aRpnVectorSize = aRpnVector.size();
02563 
02564         bool algWithExcludedCondition = false;
02565         bool algWithConditionNotInMap = false;
02566 
02567         // loop over RpnVector and check each conditions against list of excluded conditions
02568         for (size_t opI = 0; opI < aRpnVectorSize; ++opI) {
02569 
02570             const std::string& cndName = (aRpnVector[opI]).operand;
02571 
02572             if (!cndName.empty()) {
02573                 bool foundCond = false;
02574 
02575                 CItCond itCond = conditionMap.find(cndName);
02576                 if (itCond != conditionMap.end()) {
02577 
02578                     const L1GtConditionCategory& cCateg =  (itCond->second)->condCategory();
02579                     const L1GtConditionType& cType =  (itCond->second)->condType();
02580                     const std::vector<L1GtObject>& objType = (itCond->second)->objectType();
02581 
02582                     // condition index in the m_excludedCondCategory, m_excludedCondType, m_excludedL1GtObject vectors
02583                     int iCond = -1;
02584 
02585                     for (std::vector<L1GtConditionCategory>::const_iterator
02586                             itCateg  = m_excludedCondCategory.begin();
02587                             itCateg != m_excludedCondCategory.end(); ++itCateg) {
02588 
02589                         iCond++;
02590 
02591                         bool matchCondCategoryValue = matchCondCategory(cCateg, (*itCateg));
02592                         bool matchCondTypeValue = matchCondType(cType, m_excludedCondType.at(iCond));
02593                         bool matchCondL1GtObjectValue = matchCondL1GtObject(objType, m_excludedL1GtObject.at(iCond));
02594 
02595                         LogTrace("L1GtHwValidation")
02596                                 << "\n  "
02597                                 << "Algorithm: " << algName
02598                                 << " Condition: " << cndName
02599                                 << "\n  "
02600                                 << "Category:  " << l1GtConditionCategoryEnumToString(cCateg)
02601                                 << "; excluded: " << l1GtConditionCategoryEnumToString((*itCateg))
02602                                 << "\n  "
02603                                 << "Type:      " << l1GtConditionTypeEnumToString(cType)
02604                                 << "; excluded: " << l1GtConditionTypeEnumToString(m_excludedCondType.at(iCond))
02605                                 << "\n  "
02606                                 << "Object excluded: " << l1GtObjectEnumToString(m_excludedL1GtObject.at(iCond))
02607                                 << std::endl;
02608 
02609 
02610                         if (matchCondCategoryValue && matchCondTypeValue && matchCondL1GtObjectValue) {
02611 
02612                             algWithExcludedCondition = true;
02613 
02614                         }
02615 
02616                     }
02617 
02618                     foundCond = true;
02619                 }
02620 
02621                 if (!foundCond) {
02622                     // it should never be happen, all conditions are in the maps
02623 
02624                     algWithConditionNotInMap = true;
02625 
02626                     LogTrace("L1GtHwValidation") << "\n Error: condition "
02627                             << cndName << " not found in condition map!"
02628                             << "\n  Add algorithm " << algName
02629                             << " (bit number " << algBitNumber << ") "
02630                             << "\n  to list of algorithms excluded from comparison"
02631                             << "\n  data versus emulator." << std::endl;
02632                 }
02633 
02634             }
02635         }
02636 
02637         if (algWithConditionNotInMap) {
02638             // it should never be happen, all conditions are in the maps
02639 
02640             m_excludedAlgoList.push_back(algBitNumber);
02641 
02642             LogTrace("L1GtHwValidation")
02643                     << "\n Error: one or more conditions from algorithm "
02644                     << algName << " (bit number " << algBitNumber << ") "
02645                     << " not found in condition map!"
02646                     << "\n  Add it to list of algorithms excluded from comparison"
02647                     << "\n  data versus emulator." << std::endl;
02648         }
02649 
02650         if (algWithExcludedCondition) {
02651 
02652             m_excludedAlgoList.push_back(algBitNumber);
02653 
02654             LogTrace("L1GtHwValidation") << "\n Algorithm " << algName
02655                     << " (bit number " << algBitNumber
02656                     << ") contains an excluded condition."
02657                     << "\n  Add it to list of algorithms excluded from comparison"
02658                     << "\n  data versus emulator." << std::endl;
02659 
02660         }
02661 
02662         // add algorithm triggers from ExcludeAlgoTrigByName
02663         for (std::vector<std::string>::const_iterator
02664                 itExcl = m_excludeAlgoTrigByName.begin();
02665                 itExcl!= m_excludeAlgoTrigByName.end(); ++itExcl) {
02666 
02667             if ((*itExcl) == algName) {
02668 
02669                 m_excludedAlgoList.push_back(algBitNumber);
02670 
02671                 LogTrace("L1GtHwValidation") << "\n Algorithm " << algName
02672                         << " (bit number " << algBitNumber
02673                         << ")\n  added to list of algorithms excluded from comparison"
02674                         << " \n  data versus emulator by ExcludeAlgoTrigByName." << std::endl;
02675             }
02676 
02677         }
02678 
02679 
02680         // add algorithm triggers from ExcludeAlgoTrigByBit
02681         for (std::vector<int>::const_iterator
02682                 itExcl = m_excludeAlgoTrigByBit.begin();
02683                 itExcl!= m_excludeAlgoTrigByBit.end(); ++itExcl) {
02684 
02685             if ((*itExcl) == algBitNumber) {
02686 
02687                 m_excludedAlgoList.push_back(algBitNumber);
02688 
02689                 LogTrace("L1GtHwValidation") << "\n Algorithm " << algName
02690                         << " (bit number " << algBitNumber
02691                         << ")\n  added to list of algorithms excluded from comparison"
02692                         << " \n  data versus emulator by ExcludeAlgoTrigByBit." << std::endl;
02693             }
02694 
02695         }
02696 
02697     }
02698 
02699 }
02700 
02701 bool L1GtHwValidation::excludedAlgo(const int& iBit) const {
02702 
02703     for (std::vector<int>::const_iterator itAlgo = m_excludedAlgoList.begin(); itAlgo
02704             != m_excludedAlgoList.end(); ++itAlgo) {
02705 
02706         if (iBit == *itAlgo) {
02707             return true;
02708         }
02709     }
02710 
02711     return false;
02712 
02713 }
02714 
02715 
02716 void L1GtHwValidation::endRun(const edm::Run& run,
02717         const edm::EventSetup& evSetup) {
02718 
02719     LogDebug("L1GtHwValidation") << "\n\n endRun: " << run.id()
02720             << "\n  Number of events analyzed in this run:       " << m_nrEvRun
02721             << "\n  Total number of events analyzed in this job: " << m_nrEvJob
02722             << "\n" << std::endl;
02723 
02724 }
02725 
02726 // method called once each job just after ending the event loop
02727 void L1GtHwValidation::endJob() {
02728 
02729     edm::LogInfo("L1GtHwValidation")
02730             << "\n\nTotal number of events analyzed in this job: " << m_nrEvJob
02731             << "\n" << std::endl;
02732 
02733     return;
02734 
02735 }
02736 
02737 //define this as a plug-in
02738 DEFINE_FWK_MODULE( L1GtHwValidation);