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00001 // -*-C++-*- 00002 #ifndef L1TdeRCT_H 00003 #define L1TdeRCT_H 00004 00005 /* 00006 * \file L1TdeRCT.h 00007 * 00008 * Version 0.0. A.Savin 2008/04/26 00009 * 00010 * $Date: 2012/03/29 12:17:55 $ 00011 * $Revision: 1.16 $ 00012 * \author P. Wittich 00013 * $Id: L1TdeRCT.h,v 1.16 2012/03/29 12:17:55 ghete Exp $ 00014 * $Log: L1TdeRCT.h,v $ 00015 * Revision 1.16 2012/03/29 12:17:55 ghete 00016 * Add filtering of events in analyze, to be able to remove the trigger type filter from L1 DQM sequence. 00017 * 00018 * Revision 1.15 2011/10/24 14:41:23 asavin 00019 * L1TdeRCT includes bit histos + cut of 2 GeV on EcalTPG hist 00020 * 00021 * Revision 1.14 2011/10/13 09:29:16 swanson 00022 * Added exper bit monitoring 00023 * 00024 * Revision 1.13 2010/09/30 22:26:45 bachtis 00025 * Add RCT FED vector monitoring 00026 * 00027 * Revision 1.12 2010/03/25 13:46:02 weinberg 00028 * removed quiet bit information 00029 * 00030 * Revision 1.11 2009/11/19 14:35:32 puigh 00031 * modify beginJob 00032 * 00033 * Revision 1.10 2009/10/11 21:12:58 asavin 00034 * *** empty log message *** 00035 * 00036 * Revision 1.9 2008/12/11 09:20:16 asavin 00037 * efficiency curves in L1TdeRCT 00038 * 00039 * Revision 1.8 2008/11/07 15:54:03 weinberg 00040 * Changed fine grain bit to HF plus tau bit 00041 * 00042 * Revision 1.7 2008/09/22 16:48:32 asavin 00043 * reg1D overeff added 00044 * 00045 * Revision 1.6 2008/07/25 13:06:48 weinberg 00046 * added GCT region/bit information 00047 * 00048 * Revision 1.5 2008/06/30 07:34:36 asavin 00049 * TPGs inculded in the RCT code 00050 * 00051 * Revision 1.4 2008/05/06 18:04:02 nuno 00052 * cruzet update 00053 * 00054 * Revision 1.3 2008/05/05 18:42:23 asavin 00055 * DataOcc added 00056 * 00057 * Revision 1.2 2008/05/05 15:01:37 asavin 00058 * single channel histos are added 00059 * 00060 * Revision 1.4 2008/03/01 00:40:00 lat 00061 * DQM core migration. 00062 * 00063 * Revision 1.3 2007/09/03 15:14:42 wittich 00064 * updated RCT with more diagnostic and local coord histos 00065 * 00066 * Revision 1.2 2007/02/23 21:58:43 wittich 00067 * change getByType to getByLabel and add InputTag 00068 * 00069 * Revision 1.1 2007/02/19 22:49:53 wittich 00070 * - Add RCT monitor 00071 * 00072 * 00073 * 00074 */ 00075 00076 // system include files 00077 #include <memory> 00078 #include <unistd.h> 00079 00080 00081 #include <iostream> 00082 #include <fstream> 00083 #include <vector> 00084 #include <bitset> 00085 00086 00087 // user include files 00088 #include "FWCore/Framework/interface/Frameworkfwd.h" 00089 #include "FWCore/Framework/interface/EDAnalyzer.h" 00090 00091 #include "FWCore/Framework/interface/Event.h" 00092 #include "FWCore/Framework/interface/MakerMacros.h" 00093 00094 #include "FWCore/ParameterSet/interface/ParameterSet.h" 00095 00096 #include "FWCore/ServiceRegistry/interface/Service.h" 00097 #include "FWCore/MessageLogger/interface/MessageLogger.h" 00098 00099 // DQM 00100 #include "DQMServices/Core/interface/DQMStore.h" 00101 #include "DQMServices/Core/interface/MonitorElement.h" 00102 00103 00104 // Trigger Headers 00105 00106 00107 00108 00109 00110 // 00111 // class declaration 00112 // 00113 00114 class L1TdeRCT : public edm::EDAnalyzer { 00115 00116 public: 00117 00118 // Constructor 00119 L1TdeRCT(const edm::ParameterSet& ps); 00120 00121 // Destructor 00122 virtual ~L1TdeRCT(); 00123 00124 protected: 00125 // Analyze 00126 void analyze(const edm::Event& e, const edm::EventSetup& c); 00127 00128 // BeginJob 00129 void beginJob(void); 00130 00131 //For FED vector monitoring 00132 void beginRun(const edm::Run&, const edm::EventSetup&); 00133 void beginLuminosityBlock(const edm::LuminosityBlock&, const edm::EventSetup&); 00134 void readFEDVector(MonitorElement*,const edm::EventSetup&); 00135 00136 00137 00138 00139 // EndJob 00140 void endJob(void); 00141 00142 private: 00143 // ----------member data --------------------------- 00144 DQMStore * dbe; 00145 00146 // begin GT decision information 00147 MonitorElement *triggerAlgoNumbers_; 00148 00149 // trigger type information 00150 MonitorElement *triggerType_; 00151 00152 // begin region information 00153 MonitorElement *rctRegDataOcc1D_; 00154 MonitorElement *rctRegEmulOcc1D_; 00155 MonitorElement *rctRegMatchedOcc1D_; 00156 MonitorElement *rctRegUnmatchedDataOcc1D_; 00157 MonitorElement *rctRegUnmatchedEmulOcc1D_; 00158 MonitorElement *rctRegSpEffOcc1D_; 00159 MonitorElement *rctRegSpIneffOcc1D_; 00160 00161 MonitorElement *rctRegEff1D_; 00162 MonitorElement *rctRegIneff1D_; 00163 MonitorElement *rctRegOvereff1D_; 00164 MonitorElement *rctRegSpEff1D_; 00165 MonitorElement *rctRegSpIneff1D_; 00166 00167 MonitorElement *rctRegDataOcc2D_; 00168 MonitorElement *rctRegEmulOcc2D_; 00169 MonitorElement *rctRegMatchedOcc2D_; 00170 MonitorElement *rctRegUnmatchedDataOcc2D_; 00171 MonitorElement *rctRegUnmatchedEmulOcc2D_; 00172 // MonitorElement *rctRegDeltaEt2D_; 00173 MonitorElement *rctRegSpEffOcc2D_; 00174 MonitorElement *rctRegSpIneffOcc2D_; 00175 00176 MonitorElement *rctRegEff2D_; 00177 MonitorElement *rctRegIneff2D_; 00178 MonitorElement *rctRegOvereff2D_; 00179 MonitorElement *rctRegSpEff2D_; 00180 MonitorElement *rctRegSpIneff2D_; 00181 00182 MonitorElement* rctRegBitOn_ ; 00183 MonitorElement* rctRegBitOff_ ; 00184 MonitorElement* rctRegBitDiff_ ; 00185 00186 // end region information 00187 00188 // begin bit information 00189 MonitorElement *rctBitEmulOverFlow2D_; 00190 MonitorElement *rctBitDataOverFlow2D_; 00191 MonitorElement *rctBitMatchedOverFlow2D_; 00192 MonitorElement *rctBitUnmatchedEmulOverFlow2D_; 00193 MonitorElement *rctBitUnmatchedDataOverFlow2D_; 00194 MonitorElement *rctBitOverFlowEff2D_; 00195 MonitorElement *rctBitOverFlowIneff2D_; 00196 MonitorElement *rctBitOverFlowOvereff2D_; 00197 MonitorElement *rctBitEmulTauVeto2D_; 00198 MonitorElement *rctBitDataTauVeto2D_; 00199 MonitorElement *rctBitMatchedTauVeto2D_; 00200 MonitorElement *rctBitUnmatchedEmulTauVeto2D_; 00201 MonitorElement *rctBitUnmatchedDataTauVeto2D_; 00202 MonitorElement *rctBitTauVetoEff2D_; 00203 MonitorElement *rctBitTauVetoIneff2D_; 00204 MonitorElement *rctBitTauVetoOvereff2D_; 00205 MonitorElement *rctBitEmulMip2D_; 00206 MonitorElement *rctBitDataMip2D_; 00207 MonitorElement *rctBitMatchedMip2D_; 00208 MonitorElement *rctBitUnmatchedEmulMip2D_; 00209 MonitorElement *rctBitUnmatchedDataMip2D_; 00210 MonitorElement *rctBitMipEff2D_; 00211 MonitorElement *rctBitMipIneff2D_; 00212 MonitorElement *rctBitMipOvereff2D_; 00213 MonitorElement *rctBitEmulQuiet2D_; 00214 MonitorElement *rctBitDataQuiet2D_; 00215 MonitorElement *rctBitMatchedQuiet2D_; 00216 MonitorElement *rctBitUnmatchedEmulQuiet2D_; 00217 MonitorElement *rctBitUnmatchedDataQuiet2D_; 00218 // QUIETBIT: To add quiet bit information, uncomment following 3 lines: 00219 // MonitorElement *rctBitQuietEff2D_; 00220 // MonitorElement *rctBitQuietIneff2D_; 00221 // MonitorElement *rctBitQuietOvereff2D_; 00222 MonitorElement *rctBitEmulHfPlusTau2D_; 00223 MonitorElement *rctBitDataHfPlusTau2D_; 00224 MonitorElement *rctBitMatchedHfPlusTau2D_; 00225 MonitorElement *rctBitUnmatchedEmulHfPlusTau2D_; 00226 MonitorElement *rctBitUnmatchedDataHfPlusTau2D_; 00227 MonitorElement *rctBitHfPlusTauEff2D_; 00228 MonitorElement *rctBitHfPlusTauIneff2D_; 00229 MonitorElement *rctBitHfPlusTauOvereff2D_; 00230 00231 // end bit information 00232 00233 MonitorElement* rctInputTPGEcalOcc_ ; 00234 MonitorElement* rctInputTPGEcalOccNoCut_ ; 00235 MonitorElement* rctInputTPGEcalRank_ ; 00236 MonitorElement* rctInputTPGHcalOcc_ ; 00237 MonitorElement* rctInputTPGHcalRank_ ; 00238 MonitorElement* rctInputTPGHcalSample_ ; 00239 00240 MonitorElement* rctIsoEmDataOcc_ ; 00241 MonitorElement* rctIsoEmEmulOcc_ ; 00242 MonitorElement* rctIsoEmEff1Occ_ ; 00243 MonitorElement* rctIsoEmEff2Occ_ ; 00244 MonitorElement* rctIsoEmIneff2Occ_ ; 00245 MonitorElement* rctIsoEmIneffOcc_ ; 00246 MonitorElement* rctIsoEmOvereffOcc_ ; 00247 MonitorElement* rctIsoEmEff1_ ; 00248 MonitorElement* rctIsoEmEff2_ ; 00249 MonitorElement* rctIsoEmIneff2_ ; 00250 MonitorElement* rctIsoEmIneff_ ; 00251 MonitorElement* rctIsoEmOvereff_ ; 00252 00253 MonitorElement* rctIsoEmDataOcc1D_ ; 00254 MonitorElement* rctIsoEmEmulOcc1D_ ; 00255 MonitorElement* rctIsoEmEff1Occ1D_ ; 00256 MonitorElement* rctIsoEmEff2Occ1D_ ; 00257 MonitorElement* rctIsoEmIneff2Occ1D_ ; 00258 MonitorElement* rctIsoEmIneffOcc1D_ ; 00259 MonitorElement* rctIsoEmOvereffOcc1D_ ; 00260 MonitorElement* rctIsoEmEff1oneD_ ; 00261 MonitorElement* rctIsoEmEff2oneD_ ; 00262 MonitorElement* rctIsoEmIneff2oneD_ ; 00263 MonitorElement* rctIsoEmIneff1D_ ; 00264 MonitorElement* rctIsoEmOvereff1D_ ; 00265 00266 MonitorElement* rctIsoEmBitOn_ ; 00267 MonitorElement* rctIsoEmBitOff_ ; 00268 MonitorElement* rctIsoEmBitDiff_ ; 00269 00270 MonitorElement* rctNisoEmDataOcc_ ; 00271 MonitorElement* rctNisoEmEmulOcc_ ; 00272 MonitorElement* rctNisoEmEff1Occ_ ; 00273 MonitorElement* rctNisoEmEff2Occ_ ; 00274 MonitorElement* rctNisoEmIneff2Occ_ ; 00275 MonitorElement* rctNisoEmIneffOcc_ ; 00276 MonitorElement* rctNisoEmOvereffOcc_ ; 00277 MonitorElement* rctNisoEmEff1_ ; 00278 MonitorElement* rctNisoEmEff2_ ; 00279 MonitorElement* rctNisoEmIneff2_ ; 00280 MonitorElement* rctNisoEmIneff_ ; 00281 MonitorElement* rctNisoEmOvereff_ ; 00282 00283 MonitorElement* rctNisoEmDataOcc1D_ ; 00284 MonitorElement* rctNisoEmEmulOcc1D_ ; 00285 MonitorElement* rctNisoEmEff1Occ1D_ ; 00286 MonitorElement* rctNisoEmEff2Occ1D_ ; 00287 MonitorElement* rctNisoEmIneff2Occ1D_ ; 00288 MonitorElement* rctNisoEmIneffOcc1D_ ; 00289 MonitorElement* rctNisoEmOvereffOcc1D_ ; 00290 MonitorElement* rctNisoEmEff1oneD_ ; 00291 MonitorElement* rctNisoEmEff2oneD_ ; 00292 MonitorElement* rctNisoEmIneff2oneD_ ; 00293 MonitorElement* rctNisoEmIneff1D_ ; 00294 MonitorElement* rctNisoEmOvereff1D_ ; 00295 00296 MonitorElement* rctNIsoEmBitOn_ ; 00297 MonitorElement* rctNIsoEmBitOff_ ; 00298 MonitorElement* rctNIsoEmBitDiff_ ; 00299 00300 MonitorElement* rctIsoEffChannel_[396] ; 00301 MonitorElement* rctIsoIneffChannel_[396] ; 00302 MonitorElement* rctIsoOvereffChannel_[396] ; 00303 00304 MonitorElement* rctNisoEffChannel_[396] ; 00305 MonitorElement* rctNisoIneffChannel_[396] ; 00306 MonitorElement* rctNisoOvereffChannel_[396] ; 00307 00308 // begin region channel information 00309 MonitorElement* rctRegEffChannel_[396]; 00310 MonitorElement* rctRegIneffChannel_[396]; 00311 MonitorElement* rctRegOvereffChannel_[396]; 00312 00313 //efficiency 00314 MonitorElement* trigEffThresh_; 00315 MonitorElement* trigEffThreshOcc_; 00316 MonitorElement* trigEffTriggThreshOcc_; 00317 MonitorElement* trigEff_[396]; 00318 MonitorElement* trigEffOcc_[396]; 00319 MonitorElement* trigEffTriggOcc_[396]; 00320 00321 // end region channel information 00322 00323 00324 //begin fed vector information 00325 static const int crateFED[90]; 00326 MonitorElement *fedVectorMonitorRUN_; 00327 MonitorElement *fedVectorMonitorLS_; 00329 00330 00331 00332 int nev_; // Number of events processed 00333 std::string outputFile_; //file name for ROOT ouput 00334 std::string histFolder_; // base dqm folder 00335 bool verbose_; 00336 bool singlechannelhistos_; 00337 bool monitorDaemon_; 00338 ofstream logFile_; 00339 00340 edm::InputTag rctSourceEmul_; 00341 edm::InputTag rctSourceData_; 00342 edm::InputTag ecalTPGData_; 00343 edm::InputTag hcalTPGData_; 00344 edm::InputTag gtDigisLabel_; 00345 std::string gtEGAlgoName_; // name of algo to determine EG trigger threshold 00346 int doubleThreshold_; // value of ET at which to make 2-D eff plot 00347 00349 int filterTriggerType_; 00350 00351 00352 int trigCount,notrigCount; 00353 00354 protected: 00355 00356 void DivideME1D(MonitorElement* numerator, MonitorElement* denominator, MonitorElement* result) ; 00357 void DivideME2D(MonitorElement* numerator, MonitorElement* denominator, MonitorElement* result) ; 00358 00359 }; 00360 00361 #endif
1.7.3