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/data/refman/pasoursint/CMSSW_5_2_7_hltpatch1/src/L1Trigger/RPCTechnicalTrigger/src/RBCBasicConfig.cc

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00001 // $Id: RBCBasicConfig.cc,v 1.4 2009/06/07 21:18:50 aosorio Exp $
00002 // Include files 
00003 
00004 
00005 
00006 // local
00007 #include "L1Trigger/RPCTechnicalTrigger/interface/RBCBasicConfig.h"
00008 
00009 //-----------------------------------------------------------------------------
00010 // Implementation file for class : RBCBasicConfig
00011 //
00012 // 2008-10-31 : Andres Osorio
00013 //-----------------------------------------------------------------------------
00014 
00015 //=============================================================================
00016 // Standard constructor, initializes variables
00017 //=============================================================================
00018 RBCBasicConfig::RBCBasicConfig( const RBCBoardSpecs * rbcspecs , RBCId * info )
00019 {
00020   
00021   m_rbcboardspecs  = rbcspecs;
00022   m_rbclogic       = new RBCLogicUnit();
00023   m_rbcinfo        = new RBCId( *info );
00024 
00025   m_debug = false;
00026     
00027 }
00028 
00029 RBCBasicConfig::RBCBasicConfig( const char * _logic ) {
00030   
00031   m_rbclogic  = new RBCLogicUnit( _logic );
00032   
00033 }
00034 //=============================================================================
00035 // Destructor
00036 //=============================================================================
00037 RBCBasicConfig::~RBCBasicConfig() {
00038   
00039   if ( m_rbcinfo  ) delete m_rbcinfo;
00040   if ( m_rbclogic ) delete m_rbclogic;
00041 
00042   m_vecmask.clear();
00043   m_vecforce.clear();
00044   
00045 }
00046 
00047 //=============================================================================
00048 bool RBCBasicConfig::initialise() 
00049 {
00050   
00051   bool status(false);
00052   
00053   //.  read specifications
00054   
00055   std::vector<RBCBoardSpecs::RBCBoardConfig>::const_iterator itr;
00056   itr = m_rbcboardspecs->v_boardspecs.begin();
00057   
00058   // initialise logic unit
00059   m_rbclogic->setlogic( (*itr).m_LogicType.c_str() );
00060   status = m_rbclogic->initialise();
00061   
00062   m_rbclogic->setBoardSpecs( (*itr) );
00063   
00064   // get mask and force vectors
00065   
00066   m_vecmask.assign( (*itr).m_MaskedOrInput.begin(), (*itr).m_MaskedOrInput.end() );
00067   m_vecforce.assign( (*itr).m_ForcedOrInput.begin(), (*itr).m_ForcedOrInput.end() );
00068   
00069   if ( !status ) { 
00070     if( m_debug ) std::cout << "RBCConfiguration> Problem initialising the logic unit\n"; 
00071     return 0; };
00072   
00073   return 1;
00074   
00075 }
00076 
00077 void RBCBasicConfig::preprocess( RBCInput & input )
00078 {
00079   
00080   if( m_debug ) std::cout << "RBCBasicConfig::preprocess> starts here" << std::endl;
00081 
00082   input.mask( m_vecmask );
00083   input.force( m_vecforce );
00084   
00085   if( m_debug ) std::cout << "RBCBasicConfig::preprocess> done" << std::endl;
00086   
00087 }