CMSSW Reference Manual

void FastFedCablingHistosUsingDb::addDcuDetIds ( ) [virtual]

Reimplemented from CommissioningHistosUsingDb.

Definition at line 348 of file FastFedCablingHistosUsingDb.cc.

References addr, CommissioningHistosUsingDb::cabling(), SiStripConfigDb::DeviceAddress::ccuAddr_, SiStripConfigDb::DeviceAddress::ccuChan_, CommissioningHistograms::data(), CommissioningHistosUsingDb::db(), FastFedCablingAnalysis::dcuHardId(), CommissioningAnalysis::dcuId(), CommissioningAnalysis::detId(), SiStripConfigDb::deviceAddress(), SiStripConfigDb::DeviceAddress::fecCrate_, CommissioningAnalysis::fecKey(), SiStripConfigDb::DeviceAddress::fecRing_, SiStripConfigDb::DeviceAddress::fecSlot_, SiStripConfigDb::findDcuDetId(), SiStripConfigDb::getDcuDetIds(), SiStripConfigDb::getDeviceDescriptions(), getDQMSummary::key, FastFedCablingAnalysis::lldCh(), sistrip::mlCabling_, and sistrip::mlDqmClient_.

00348                                                {
00349 
00350   if ( !cabling() ) {
00351     edm::LogError(mlDqmClient_) 
00352       << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00353       << " NULL pointer to SiStripFedCabling object!";
00354     return;
00355   }
00356 
00357   // retrieve descriptions for dcu id and det id 
00358   SiStripConfigDb::DeviceDescriptionsRange dcus = db()->getDeviceDescriptions( DCU ); 
00359   SiStripConfigDb::DcuDetIdsRange detids = db()->getDcuDetIds(); 
00360   
00361   if ( dcus.empty() ) { 
00362     edm::LogError(mlCabling_)
00363       << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00364       << " No DCU descriptions found!";
00365     return;
00366   }
00367   
00368   if ( detids.empty() ) { 
00369     edm::LogWarning(mlCabling_)
00370       << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00371       << " DCU-DetId map is empty!";
00372   }
00373   
00374   Analyses::iterator ianal = data().begin();
00375   Analyses::iterator janal = data().end();
00376   for ( ; ianal != janal; ++ianal ) { 
00377 
00378     // check if analysis is valid (ie, dcu id and lld channel have been identified)
00379     if ( !ianal->second->isValid() ) { continue; }
00380     
00381     // retrieve analysis object
00382     FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
00383     
00384     if ( !anal ) {
00385       edm::LogError(mlDqmClient_) 
00386         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00387         << " NULL pointer to FastFedCablingAnalysis object!";
00388       return;
00389     }
00390 
00391     // find dcu that matches analysis result 
00392     bool found = false;
00393     SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
00394     SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
00395     while ( !found && idcu != jdcu ) {
00396       dcuDescription* dcu = dynamic_cast<dcuDescription*>( *idcu );
00397       if ( dcu ) { 
00398         if ( dcu->getDcuType() == "FEH" ) { 
00399           if ( dcu->getDcuHardId() == anal->dcuHardId() ) {
00400             found = true; 
00401             anal->dcuId( dcu->getDcuHardId() ); 
00402             const SiStripConfigDb::DeviceAddress& addr = db()->deviceAddress(*dcu);
00403             uint32_t fec_key = SiStripFecKey( addr.fecCrate_,
00404                                               addr.fecSlot_,
00405                                               addr.fecRing_,
00406                                               addr.ccuAddr_,
00407                                               addr.ccuChan_,
00408                                               anal->lldCh() ).key();
00409             anal->fecKey( fec_key );
00410             SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
00411             idet = SiStripConfigDb::findDcuDetId( detids.begin(), detids.end(), dcu->getDcuHardId() );
00412             if ( idet != detids.end() ) { anal->detId( idet->second->getDetId() ); }
00413           }
00414         }
00415       }
00416       idcu++;
00417     }
00418 
00419   }
00420 
00421 }

void FastFedCablingHistosUsingDb::connections	(	SiStripConfigDb::DeviceDescriptionsRange	dcus,
		SiStripConfigDb::DcuDetIdsRange	detids
	)			`[private]`

Definition at line 486 of file FastFedCablingHistosUsingDb.cc.

References FastFedCablingAnalysis::badTrimDac(), SiStripConfigDb::DeviceAddress::ccuAddr_, SiStripConfigDb::DeviceAddress::ccuChan_, CommissioningHistograms::data(), CommissioningHistosUsingDb::db(), FastFedCablingAnalysis::dcuHardId(), CommissioningAnalysis::dcuId(), CommissioningAnalysis::detId(), SiStripConfigDb::deviceAddress(), lat::endl(), SiStripConfigDb::DeviceAddress::fecCrate_, CommissioningAnalysis::fecKey(), SiStripConfigDb::DeviceAddress::fecRing_, SiStripConfigDb::DeviceAddress::fecSlot_, CommissioningAnalysis::fedKey(), find(), SiStripConfigDb::findDcuDetId(), SiStripConfigDb::getDeviceDescriptions(), SiStripConfigDb::DeviceAddress::i2cAddr_, FastFedCablingAnalysis::isDirty(), FastFedCablingAnalysis::isValid(), iter, LogTrace, combine::missing, sistrip::mlCabling_, mergeAndRegister_online::pairs, ss, and TrackValidation_HighPurity_cff::valid.

Referenced by uploadConfigurations().

00487                                                                                       {
00488   
00489   // strings
00490   std::vector<std::string> valid;
00491   std::vector<std::string> dirty;
00492   std::vector<std::string> trimdac;
00493   std::vector<std::string> missing;
00494   std::vector<std::string> devices;
00495   uint32_t missing_pairs = 0;
00496 
00497   // iterate through analyses
00498   std::vector<uint32_t> found_dcus;
00499   Analyses::iterator ianal = data().begin();
00500   Analyses::iterator janal = data().end();
00501   for ( ; ianal != janal; ++ianal ) {
00502 
00503     // extract fast fed cabling object
00504     FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
00505     if ( !anal ) { continue; }
00506     
00507     // construct strings for various categories of connections
00508     std::stringstream ss;
00509     SiStripFedKey( anal->fedKey() ).terse(ss); ss << " ";
00510     SiStripFecKey( anal->fecKey() ).terse(ss); ss << " "; 
00511     ss << "DcuId= " << std::hex << std::setw(8) << std::setfill('0') << anal->dcuId() << std::dec << " ";
00512     ss << "DetId= " << std::hex << std::setw(8) << std::setfill('0') << anal->detId() << std::dec;
00513     if ( anal->isValid() &&
00514          !(anal->isDirty()) &&
00515          !(anal->badTrimDac()) ) { valid.push_back( ss.str() ); }
00516     if ( anal->isDirty() ) { dirty.push_back( ss.str() ); }
00517     if ( anal->badTrimDac() ) { trimdac.push_back( ss.str() ); }
00518     
00519     // record "found" dcus
00520     found_dcus.push_back( anal->dcuHardId() );
00521 
00522   }
00523   
00524   // iterate through dcu devices
00525   SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
00526   SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
00527   for ( ; idcu != jdcu; ++idcu ) {
00528     
00529     // extract dcu description
00530     dcuDescription* dcu = dynamic_cast<dcuDescription*>( *idcu );
00531     if ( !dcu ) { continue; }
00532     if ( dcu->getDcuType() != "FEH" ) { continue; }
00533     SiStripConfigDb::DeviceAddress dcu_addr = db()->deviceAddress( *dcu );
00534     
00535     // continue if dcu has been "found"
00536     std::vector<uint32_t>::const_iterator iter = find( found_dcus.begin(), found_dcus.end(), dcu->getDcuHardId() );
00537     if ( iter != found_dcus.end() ) { continue; }
00538     
00539     // find detid for "missing" dcu
00540     SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
00541     idet = SiStripConfigDb::findDcuDetId( detids.begin(), detids.end(), dcu->getDcuHardId() );
00542     if ( idet == detids.end() ) { continue; }
00543     if ( idet->second ) { continue; }
00544     
00545     // retrieve number of apv pairs
00546     uint16_t npairs = idet->second->getApvNumber()/2; 
00547   
00548     // retrieve apvs for given dcu
00549     vector<bool> addrs; 
00550     addrs.resize(6,false);
00551     SiStripConfigDb::DeviceDescriptionsRange apvs = db()->getDeviceDescriptions( APV25 );
00552     SiStripConfigDb::DeviceDescriptionsV::const_iterator iapv = apvs.begin();
00553     SiStripConfigDb::DeviceDescriptionsV::const_iterator japv = apvs.end();
00554     for ( ; iapv != japv; ++iapv ) {
00555       apvDescription* apv = dynamic_cast<apvDescription*>( *iapv );
00556       if ( !apv ) { continue; }
00557       SiStripConfigDb::DeviceAddress apv_addr = db()->deviceAddress( *apv );
00558       if ( apv_addr.fecCrate_ == dcu_addr.fecCrate_ &&
00559            apv_addr.fecSlot_  == dcu_addr.fecSlot_ &&
00560            apv_addr.fecRing_  == dcu_addr.fecRing_ &&
00561            apv_addr.ccuAddr_  == dcu_addr.ccuAddr_ &&
00562            apv_addr.ccuChan_  == dcu_addr.ccuChan_ ) {
00563         uint16_t pos = apv_addr.i2cAddr_ - 32;
00564         if ( pos < 6 ) { addrs[pos] = true; }
00565       }
00566     }
00567     
00568     // construct strings for missing fibres
00569     uint16_t pairs = 0;
00570     if ( addrs[0] || addrs[1] ) {
00571       pairs++;
00572       std::stringstream ss;
00573       SiStripFecKey( dcu_addr.fecCrate_,
00574                      dcu_addr.fecSlot_,
00575                      dcu_addr.fecRing_,
00576                      dcu_addr.ccuAddr_,
00577                      dcu_addr.ccuChan_,
00578                      1 ).terse(ss); 
00579       ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00580       ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00581       missing.push_back( ss.str() ); 
00582     } 
00583     if ( addrs[2] || addrs[3] ) {
00584       pairs++;
00585       std::stringstream ss;
00586       SiStripFecKey( dcu_addr.fecCrate_,
00587                      dcu_addr.fecSlot_,
00588                      dcu_addr.fecRing_,
00589                      dcu_addr.ccuAddr_,
00590                      dcu_addr.ccuChan_,
00591                      2 ).terse(ss); 
00592       ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00593       ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00594       missing.push_back( ss.str() ); 
00595     } 
00596     if ( addrs[4] || addrs[5] ) {
00597       pairs++;
00598       std::stringstream ss;
00599       SiStripFecKey( dcu_addr.fecCrate_,
00600                      dcu_addr.fecSlot_,
00601                      dcu_addr.fecRing_,
00602                      dcu_addr.ccuAddr_,
00603                      dcu_addr.ccuChan_,
00604                      3 ).terse(ss); 
00605       ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00606       ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00607       missing.push_back( ss.str() ); 
00608     }
00609     
00610     if ( pairs != npairs ) {
00611       
00612       missing_pairs = npairs - pairs;
00613       
00614       if ( !addrs[0] ) { 
00615         std::stringstream ss;
00616         SiStripFecKey( dcu_addr.fecCrate_,
00617                        dcu_addr.fecSlot_,
00618                        dcu_addr.fecRing_,
00619                        dcu_addr.ccuAddr_,
00620                        dcu_addr.ccuChan_,
00621                        1, 32 ).terse(ss); 
00622         ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00623         ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00624         devices.push_back( ss.str() ); 
00625       }
00626       
00627       if ( !addrs[1] ) { 
00628         std::stringstream ss;
00629         SiStripFecKey( dcu_addr.fecCrate_,
00630                        dcu_addr.fecSlot_,
00631                        dcu_addr.fecRing_,
00632                        dcu_addr.ccuAddr_,
00633                        dcu_addr.ccuChan_,
00634                        1, 33 ).terse(ss); 
00635         ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00636         ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00637         devices.push_back( ss.str() ); 
00638       }
00639       
00640       if ( !addrs[2] && npairs == 3 ) {
00641         std::stringstream ss;
00642         SiStripFecKey( dcu_addr.fecCrate_,
00643                        dcu_addr.fecSlot_,
00644                        dcu_addr.fecRing_,
00645                        dcu_addr.ccuAddr_,
00646                        dcu_addr.ccuChan_,
00647                        2, 34 ).terse(ss); 
00648         ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00649         ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00650         devices.push_back( ss.str() ); 
00651       }
00652       
00653       if ( !addrs[3] && npairs == 3 ) {
00654         std::stringstream ss;
00655         SiStripFecKey( dcu_addr.fecCrate_,
00656                        dcu_addr.fecSlot_,
00657                        dcu_addr.fecRing_,
00658                        dcu_addr.ccuAddr_,
00659                        dcu_addr.ccuChan_,
00660                        2, 35 ).terse(ss); 
00661         ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00662         ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00663         devices.push_back( ss.str() ); 
00664       }
00665       
00666       if ( !addrs[4] ) { 
00667         std::stringstream ss;
00668         SiStripFecKey( dcu_addr.fecCrate_,
00669                        dcu_addr.fecSlot_,
00670                        dcu_addr.fecRing_,
00671                        dcu_addr.ccuAddr_,
00672                        dcu_addr.ccuChan_,
00673                        3, 36 ).terse(ss); 
00674         ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00675         ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00676         devices.push_back( ss.str() ); 
00677       }
00678       
00679       if ( !addrs[5] ) { 
00680         std::stringstream ss;
00681         SiStripFecKey( dcu_addr.fecCrate_,
00682                        dcu_addr.fecSlot_,
00683                        dcu_addr.fecRing_,
00684                        dcu_addr.ccuAddr_,
00685                        dcu_addr.ccuChan_,
00686                        3, 37 ).terse(ss); 
00687         ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
00688         ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
00689         devices.push_back( ss.str() ); 
00690       }
00691       
00692     }
00693 
00694   }
00695 
00696   // summary
00697   { 
00698     std::stringstream ss;
00699     ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00700        << " Summary of connections: " << std::endl
00701        << " \"Good\" connections     : " << valid.size() << std::endl
00702        << " \"Dirty\" connections    : " << dirty.size() << std::endl
00703        << " \"Bad\" TrimDAQ settings : " << trimdac.size() << std::endl
00704        << " (\"Missing\" connections : " << missing.size() << ")" << std::endl
00705        << " (\"Missing\" APV pairs   : " << missing_pairs << ")" << std::endl
00706        << " (\"Missing\" APVs        : " << devices.size() << ")" << std::endl;
00707     edm::LogVerbatim(mlCabling_) << ss.str();
00708   }
00709 
00710   // good connections
00711   if ( !valid.empty() ) { 
00712     std::stringstream ss;
00713     ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00714        << " List of \"good\" connections: " << std::endl;
00715     std::vector<std::string>::const_iterator istr = valid.begin();
00716     std::vector<std::string>::const_iterator jstr = valid.end();
00717     for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
00718     LogTrace(mlCabling_) << ss.str();
00719   }
00720 
00721   // dirty connections
00722   if ( !dirty.empty() ) { 
00723     std::stringstream ss;
00724     ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00725        << " List of \"dirty\" connections: " << std::endl;
00726     std::vector<std::string>::const_iterator istr = dirty.begin();
00727     std::vector<std::string>::const_iterator jstr = dirty.end();
00728     for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
00729     edm::LogWarning(mlCabling_) << ss.str();
00730   }
00731 
00732   // TrimDAC connections
00733   if ( !trimdac.empty() ) { 
00734     std::stringstream ss;
00735     ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00736        << " List of \"bad\" TrimDAC settings: " << std::endl;
00737     std::vector<std::string>::const_iterator istr = trimdac.begin();
00738     std::vector<std::string>::const_iterator jstr = trimdac.end();
00739     for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
00740     edm::LogWarning(mlCabling_) << ss.str();
00741   }
00742 
00743   // missing connections
00744   if ( !missing.empty() ) { 
00745     std::stringstream ss;
00746     ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00747        << " List of \"missing\" connections: " << std::endl;
00748     std::vector<std::string>::const_iterator istr = missing.begin();
00749     std::vector<std::string>::const_iterator jstr = missing.end();
00750     for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
00751     edm::LogError(mlCabling_) << ss.str();
00752   }
00753 
00754   // missing devices
00755   if ( !devices.empty() ) { 
00756     std::stringstream ss;
00757     ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00758        << " List of \"missing\" APVs: " << std::endl;
00759     std::vector<std::string>::const_iterator istr = devices.begin();
00760     std::vector<std::string>::const_iterator jstr = devices.end();
00761     for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
00762     edm::LogError(mlCabling_) << ss.str();
00763   }
00764 
00765 }

void FastFedCablingHistosUsingDb::create	(	SiStripConfigDb::AnalysisDescriptionsV &	desc,
		Analysis	analysis
	)			`[private, virtual]`

Reimplemented from CommissioningHistosUsingDb.

Definition at line 425 of file FastFedCablingHistosUsingDb.cc.

00426                                                               {
00427 
00428 #ifdef USING_NEW_DATABASE_MODEL
00429   
00430   FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( analysis->second );
00431   if ( !anal ) { return; }
00432   
00433   if ( !anal->isValid() || anal->dcuId() == sistrip::invalid32_ ) { return; } //@@ only store valid descriptions!
00434   
00435   SiStripFecKey fec_key( anal->fecKey() );
00436   SiStripFedKey fed_key( anal->fedKey() );
00437     
00438   for ( uint16_t iapv = 0; iapv < 2; ++iapv ) {
00439     
00440     // Create description
00441     FastFedCablingAnalysisDescription* tmp;
00442     tmp = new FastFedCablingAnalysisDescription( anal->highLevel(),
00443                                                  anal->highRms(),
00444                                                  anal->lowLevel(),
00445                                                  anal->lowRms(),
00446                                                  anal->max(),
00447                                                  anal->min(),
00448                                                  anal->dcuId(),
00449                                                  anal->lldCh(),
00450                                                  anal->isDirty(),
00451                                                  FastFedCablingAnalysis::threshold_,
00452                                                  FastFedCablingAnalysis::dirtyThreshold_,
00453                                                  fec_key.fecCrate(),
00454                                                  fec_key.fecSlot(),
00455                                                  fec_key.fecRing(),
00456                                                  fec_key.ccuAddr(),
00457                                                  fec_key.ccuChan(),
00458                                                  SiStripFecKey::i2cAddr( fec_key.lldChan(), !iapv ), 
00459                                                  db()->dbParams().partitions().begin()->second.partitionName(),
00460                                                  db()->dbParams().partitions().begin()->second.runNumber(),
00461                                                  anal->isValid(),
00462                                                  "",
00463                                                  fed_key.fedId(),
00464                                                  fed_key.feUnit(),
00465                                                  fed_key.feChan(),
00466                                                  fed_key.fedApv() );
00467       
00468     // Add comments
00469     typedef std::vector<std::string> Strings;
00470     Strings errors = anal->getErrorCodes();
00471     Strings::const_iterator istr = errors.begin();
00472     Strings::const_iterator jstr = errors.end();
00473     for ( ; istr != jstr; ++istr ) { tmp->addComments( *istr ); }
00474 
00475     // Store description
00476     desc.push_back( tmp );
00477       
00478   }
00479 
00480 #endif
00481   
00482 }

void FastFedCablingHistosUsingDb::update ( SiStripConfigDb::FedDescriptionsRange feds ) [private]

Definition at line 234 of file FastFedCablingHistosUsingDb.cc.

References addr, CommissioningHistograms::data(), e, end, lat::endl(), SiStripFedKey::feChan(), sistrip::FEDCH_PER_FED, CommissioningAnalysis::fedKey(), SiStripFedKey::feUnit(), first, iter, getDQMSummary::key, prof2calltree::last, LogTrace, sistrip::mlDqmClient_, and ss.

00234                                                                                    {
00235 
00236   // Iterate through feds and disable all channels 
00237   SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin();
00238   SiStripConfigDb::FedDescriptionsV::const_iterator jfed = feds.end();
00239   try {
00240     for ( ; ifed != jfed; ++ifed ) {
00241       for ( uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++ ) {
00242         Fed9U::Fed9UAddress addr( ichan );
00243         Fed9U::Fed9UAddress addr0( ichan, static_cast<Fed9U::u8>(0) );
00244         Fed9U::Fed9UAddress addr1( ichan, static_cast<Fed9U::u8>(1) );
00245         (*ifed)->setFedFeUnitDisable( addr, true );
00246         (*ifed)->setApvDisable( addr0, true );
00247         (*ifed)->setApvDisable( addr1, true );
00248       }
00249     }
00250   } catch( ICUtils::ICException& e ) {
00251     edm::LogWarning(mlDqmClient_) << e.what();
00252   }
00253   
00254   // Counters for number of connected / enabled channels
00255   uint16_t connected = 0;
00256   std::map< uint16_t, std::vector<uint16_t> > enabled;
00257 
00258   // Iterate through feds and enable connected channels
00259   for ( ifed = feds.begin(); ifed != feds.end(); ifed++ ) {
00260     for ( uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++ ) {
00261       
00262       // Retrieve FEC key from FED-FEC map
00263       SiStripFedKey fed( static_cast<uint16_t>( (*ifed)->getFedId() ),
00264                          SiStripFedKey::feUnit(ichan),
00265                          SiStripFedKey::feChan(ichan) );
00266       uint32_t fed_key = fed.key();
00267       
00268       // Retrieve analysis for given FED id and channel
00269       Analyses::const_iterator iter = data().find( fed_key );
00270       if ( iter == data().end() ) { continue; }
00271       
00272       if ( !iter->second->isValid() ) { continue; }
00273       
00274       FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( iter->second );
00275       if ( !anal ) { 
00276         edm::LogError(mlDqmClient_)
00277           << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00278           << " NULL pointer to OptoScanAnalysis object!";
00279         continue; 
00280       }
00281       
00282       // Retrieve FED id and channel 
00283       SiStripFedKey key( anal->fedKey() );
00284       uint16_t fed_id = key.fedId();
00285       uint16_t fed_ch = key.fedChannel();
00286       
00287       // Enable front-end unit and channel
00288       Fed9U::Fed9UAddress addr( fed_ch );
00289       Fed9U::Fed9UAddress addr0( fed_ch, static_cast<Fed9U::u8>(0) );
00290       Fed9U::Fed9UAddress addr1( fed_ch, static_cast<Fed9U::u8>(1) );
00291       (*ifed)->setFedFeUnitDisable( addr, false );
00292       (*ifed)->setApvDisable( addr0, false );
00293       (*ifed)->setApvDisable( addr1, false );
00294       connected++;
00295       enabled[fed_id].push_back(fed_ch);
00296       
00297     }
00298   }
00299       
00300   // Some debug 
00301   std::stringstream sss;
00302   if ( !feds.empty() ) {
00303     sss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00304         << " Enabled a total of " << connected 
00305         << " FED channels and disabled " << feds.size() * 96 - connected 
00306         << " FED channels (" << 100 * connected / ( feds.size() * 96 )
00307         << "% of total)";
00308     edm::LogVerbatim(mlDqmClient_) << sss.str();
00309   } else {
00310     sss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00311         << " Found no FEDs! (and therefore no connected channels)";
00312     edm::LogWarning(mlDqmClient_) << sss.str();
00313   }
00314   
00315   // Some debug 
00316   std::stringstream ss;
00317   ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00318      << " Dump of enabled FED channels:" 
00319      << std::endl;
00320   std::map< uint16_t, std::vector<uint16_t> >::const_iterator fed = enabled.begin();
00321   for ( ; fed != enabled.end(); fed++ ) {
00322     ss << " Enabled " << fed->second.size()
00323        << " channels for FED id " 
00324        << std::setw(3) << fed->first << ": ";
00325     if ( !fed->second.empty() ) { 
00326       uint16_t first = fed->second.front();
00327       uint16_t last = fed->second.front();
00328       std::vector<uint16_t>::const_iterator chan = fed->second.begin();
00329       for ( ; chan != fed->second.end(); chan++ ) { 
00330         if ( chan != fed->second.begin() ) {
00331           if ( *chan != last+1 ) { 
00332             ss << std::setw(2) << first << "->" << std::setw(2) << last << ", ";
00333             if ( chan != fed->second.end() ) { first = *(chan+1); }
00334           } 
00335         }
00336         last = *chan;
00337       }
00338       if ( first != last ) { ss << std::setw(2) << first << "->" << std::setw(2) << last; }
00339       ss << std::endl;
00340     }
00341   }
00342   LogTrace(mlDqmClient_) << ss.str();
00343   
00344 }

void FastFedCablingHistosUsingDb::update	(	SiStripConfigDb::FedConnectionsV &	conns,
		SiStripConfigDb::FedDescriptionsRange	feds,
		SiStripConfigDb::DeviceDescriptionsRange	dcus,
		SiStripConfigDb::DcuDetIdsRange	detids
	)			`[private]`

Definition at line 117 of file FastFedCablingHistosUsingDb.cc.

References CommissioningHistograms::data(), FastFedCablingAnalysis::dcuHardId(), CommissioningAnalysis::dcuId(), lat::endl(), CommissioningAnalysis::fecKey(), CommissioningAnalysis::fedKey(), SiStripConfigDb::findDcuDetId(), SiStripFecKey::i2cAddr(), sistrip::invalid32_, sistrip::invalid_, FastFedCablingAnalysis::isValid(), FastFedCablingAnalysis::lldCh(), LogTrace, sistrip::mlDqmClient_, sistrip::mlTest_, and ss.

Referenced by uploadConfigurations().

00120                                                                                  {
00121   
00122   // Update FED-FEC mapping in base class, based on analysis results
00123   Analyses::iterator ianal = data().begin();
00124   Analyses::iterator janal = data().end();
00125   for ( ; ianal != janal; ++ianal ) {
00126     
00127     FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
00128     if ( !anal ) { 
00129       edm::LogError(mlDqmClient_)
00130         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00131         << " NULL pointer to analysis object!";
00132       continue; 
00133     }
00134     
00135     if ( !anal->isValid() || anal->dcuId() == sistrip::invalid32_ ) { continue; }
00136     
00137     SiStripFecKey fec_key( anal->fecKey() );
00138     SiStripFedKey fed_key( anal->fedKey() );
00139     
00140 #ifdef USING_NEW_DATABASE_MODEL 
00141 
00142     ConnectionDescription* conn = new ConnectionDescription();
00143     conn->setFedId( fed_key.fedId() );
00144     conn->setFedChannel( fed_key.fedChannel() );
00145     conn->setFecHardwareId( "" ); //@@
00146     conn->setFecCrateId( fec_key.fecCrate() );
00147     conn->setFecSlot( fec_key.fecSlot() );
00148     conn->setRingSlot( fec_key.fecRing() );
00149     conn->setCcuAddress( fec_key.ccuAddr() );
00150     conn->setI2cChannel( fec_key.ccuChan() );
00151     conn->setApvAddress( SiStripFecKey::i2cAddr(anal->lldCh(),true) );
00152     conn->setDcuHardId( anal->dcuHardId() );
00153     
00154     // Retrieve FED crate and slot numbers
00155     bool found = false;
00156     SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin();
00157     while ( ifed != feds.end() && !found ) {
00158       if ( *ifed ) {
00159         uint16_t fed_id = static_cast<uint16_t>( (*ifed)->getFedId() );
00160         if ( fed_key.fedId() == fed_id ) {
00161           conn->setFedCrateId( static_cast<uint16_t>( (*ifed)->getCrateNumber() ) );
00162           conn->setFedSlot( static_cast<uint16_t>( (*ifed)->getSlotNumber() ) );
00163           found = true;
00164         }
00165       } else {
00166         edm::LogError(mlDqmClient_)
00167           << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00168           << " NULL pointer to Fed9UDescription object!";
00169         continue; 
00170       }
00171       ++ifed;
00172     }
00173     if ( !found ) {
00174       edm::LogError(mlDqmClient_)
00175         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00176         << " Could not find FED id " << fed_key.fedId()
00177         << " in vector of FED descriptions!"
00178         << " Unable to set FED crate and slot for this FED!";
00179     }
00180     
00181 #else
00182 
00183     FedChannelConnectionDescription* conn = new FedChannelConnectionDescription(); 
00184     conn->setFedId( fed_key.fedId() );
00185     conn->setFedChannel( fed_key.fedChannel() );
00186     conn->setFecSupervisor( "" );
00187     conn->setFecSupervisorIP( "" );
00188     conn->setFecInstance( fec_key.fecCrate() );
00189     conn->setSlot( fec_key.fecSlot() );
00190     conn->setRing( fec_key.fecRing() );
00191     conn->setCcu( fec_key.ccuAddr() );
00192     conn->setI2c( fec_key.ccuChan() );
00193     conn->setApv( SiStripFecKey::i2cAddr(anal->lldCh(),true) );
00194     conn->setDcuHardId( anal->dcuHardId() );
00195 
00196     SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
00197     idet = SiStripConfigDb::findDcuDetId( detids.begin(), detids.end(), anal->dcuHardId() );
00198     if ( idet != detids.end() ) { 
00199       conn->setDetId( idet->second->getDetId() );
00200       conn->setApvPairs( idet->second->getApvNumber()/2 );
00201       conn->setFiberLength( static_cast<uint32_t>( idet->second->getFibreLength() ) );
00202     } else {
00203       conn->setDetId( sistrip::invalid32_ );
00204       conn->setApvPairs( sistrip::invalid_ ); 
00205       conn->setFiberLength( sistrip::invalid_ );
00206     }
00207 
00208 #endif
00209     
00210     conns.push_back(conn);
00211 
00212   }  
00213 
00214   if (0) {
00215 #ifdef USING_NEW_DATABASE_MODEL 
00216     SiStripConfigDb::FedConnectionsV::iterator ifed = conns.begin();
00217     for ( ; ifed != conns.end(); ifed++ ) { (*ifed)->display(); }
00218 #else
00219     std::stringstream ss; 
00220     ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00221        << " Dump of " << conns.size() 
00222        << " FedChannelConnection descriptions: "
00223        << std::endl;
00224     SiStripConfigDb::FedConnectionsV::iterator ifed = conns.begin();
00225     for ( ; ifed != conns.end(); ifed++ ) { (*ifed)->toXML(ss); }
00226     LogTrace(mlTest_) << ss.str();
00227 #endif
00228   }
00229 
00230 }

void FastFedCablingHistosUsingDb::uploadConfigurations ( ) [virtual]

Reimplemented from CommissioningHistosUsingDb.

Definition at line 47 of file FastFedCablingHistosUsingDb.cc.

References SiStripConfigDb::addFedConnections(), SiStripConfigDb::clearFedConnections(), connections(), CommissioningHistosUsingDb::db(), SiStripConfigDb::dbParams(), CommissioningHistosUsingDb::doUploadConf(), SiStripConfigDb::getDcuDetIds(), SiStripConfigDb::getDeviceDescriptions(), SiStripConfigDb::getFedDescriptions(), LogTrace, sistrip::mlDqmClient_, SiStripDbParams::partitions(), update(), SiStripConfigDb::uploadFedConnections(), and SiStripConfigDb::uploadFedDescriptions().

00047                                                        {
00048   LogTrace(mlDqmClient_) 
00049     << "[FastFedCablingHistosUsingDb::" << __func__ << "]";
00050   
00051   if ( !db() ) {
00052     edm::LogError(mlDqmClient_) 
00053       << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00054       << " NULL pointer to SiStripConfigDb interface!"
00055       << " Aborting upload...";
00056     return;
00057   }
00058 
00059   SiStripDbParams::SiStripPartitions::const_iterator ip = db()->dbParams().partitions().begin();
00060   SiStripDbParams::SiStripPartitions::const_iterator jp = db()->dbParams().partitions().end();
00061   for ( ; ip != jp; ++ip ) {
00062     
00063     // Retrieve descriptions
00064     db()->clearFedConnections(); 
00065     SiStripConfigDb::FedDescriptionsRange feds = db()->getFedDescriptions( ip->second.partitionName() ); 
00066     SiStripConfigDb::DeviceDescriptionsRange dcus = db()->getDeviceDescriptions( DCU, ip->second.partitionName() ); 
00067     SiStripConfigDb::DcuDetIdsRange detids = db()->getDcuDetIds( ip->second.partitionName() ); 
00068     
00069     // Update FED connection descriptions
00070     SiStripConfigDb::FedConnectionsV conns;
00071     update( conns, feds, dcus, detids );
00072     
00073     if ( doUploadConf() ) { 
00074       edm::LogVerbatim(mlDqmClient_) 
00075         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00076         << " Uploading FED connections for partition \"" 
00077         << ip->second.partitionName() << "\" to DB...";
00078       db()->clearFedConnections( ip->second.partitionName() ); 
00079       db()->addFedConnections( ip->second.partitionName(), conns ); 
00080       db()->uploadFedConnections( ip->second.partitionName() ); 
00081       edm::LogVerbatim(mlDqmClient_) 
00082         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00083         << " Completed database upload of " << conns.size() 
00084         << " ConnectionDescriptions!";
00085     } else {
00086       edm::LogWarning(mlDqmClient_) 
00087         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00088         << " TEST only! No FED connections will be uploaded to DB...";
00089     }
00090     
00091     // Update FED descriptions with enabled/disabled channels
00092     update( feds );
00093     if ( doUploadConf() ) { 
00094       edm::LogVerbatim(mlDqmClient_) 
00095         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00096         << " Uploading FED descriptions to DB...";
00097       db()->uploadFedDescriptions( ip->second.partitionName() ); 
00098       edm::LogVerbatim(mlDqmClient_) 
00099         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00100         << " Completed database upload of " << feds.size()
00101         << " Fed9UDescriptions (with connected channels enabled)!";
00102     } else {
00103       edm::LogWarning(mlDqmClient_) 
00104         << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
00105         << " TEST only! No FED descriptions will be uploaded to DB...";
00106     }
00107     
00108     // Some debug on good / dirty / missing connections
00109     connections( dcus, detids );
00110     
00111   }
00112   
00113 }


Public Member Functions
virtual void	addDcuDetIds ()
	FastFedCablingHistosUsingDb (DQMStore , SiStripConfigDb const )
	FastFedCablingHistosUsingDb (DQMOldReceiver , SiStripConfigDb const )
virtual void	uploadConfigurations ()
virtual	~FastFedCablingHistosUsingDb ()
Private Member Functions
void	connections (SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
void	create (SiStripConfigDb::AnalysisDescriptionsV &, Analysis)
void	update (SiStripConfigDb::FedDescriptionsRange)
void	update (SiStripConfigDb::FedConnectionsV &, SiStripConfigDb::FedDescriptionsRange, SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)

FastFedCablingHistosUsingDb::FastFedCablingHistosUsingDb	(	DQMOldReceiver *	mui,
		SiStripConfigDb * const	db
	)

FastFedCablingHistosUsingDb::FastFedCablingHistosUsingDb	(	DQMStore *	bei,
		SiStripConfigDb * const	db
	)

FastFedCablingHistosUsingDb Class Reference

Public Member Functions

Private Member Functions

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation