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L1TdeRCT.h

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00001 // -*-C++-*-
00002 #ifndef L1TdeRCT_H
00003 #define L1TdeRCT_H
00004 
00005 /*
00006  * \file L1TdeRCT.h
00007  *
00008  * Version 0.0. A.Savin 2008/04/26
00009  *
00010  * $Date: 2008/11/07 15:54:03 $
00011  * $Revision: 1.8 $
00012  * \author P. Wittich
00013  * $Id: L1TdeRCT.h,v 1.8 2008/11/07 15:54:03 weinberg Exp $
00014  * $Log: L1TdeRCT.h,v $
00015  * Revision 1.8  2008/11/07 15:54:03  weinberg
00016  * Changed fine grain bit to HF plus tau bit
00017  *
00018  * Revision 1.7  2008/09/22 16:48:32  asavin
00019  * reg1D overeff added
00020  *
00021  * Revision 1.6  2008/07/25 13:06:48  weinberg
00022  * added GCT region/bit information
00023  *
00024  * Revision 1.5  2008/06/30 07:34:36  asavin
00025  * TPGs inculded in the RCT code
00026  *
00027  * Revision 1.4  2008/05/06 18:04:02  nuno
00028  * cruzet update
00029  *
00030  * Revision 1.3  2008/05/05 18:42:23  asavin
00031  * DataOcc added
00032  *
00033  * Revision 1.2  2008/05/05 15:01:37  asavin
00034  * single channel histos are added
00035  *
00036  * Revision 1.4  2008/03/01 00:40:00  lat
00037  * DQM core migration.
00038  *
00039  * Revision 1.3  2007/09/03 15:14:42  wittich
00040  * updated RCT with more diagnostic and local coord histos
00041  *
00042  * Revision 1.2  2007/02/23 21:58:43  wittich
00043  * change getByType to getByLabel and add InputTag
00044  *
00045  * Revision 1.1  2007/02/19 22:49:53  wittich
00046  * - Add RCT monitor
00047  *
00048  *
00049  *
00050 */
00051 
00052 // system include files
00053 #include <memory>
00054 #include <unistd.h>
00055 
00056 
00057 #include <iostream>
00058 #include <fstream>
00059 #include <vector>
00060 
00061 
00062 // user include files
00063 #include "FWCore/Framework/interface/Frameworkfwd.h"
00064 #include "FWCore/Framework/interface/EDAnalyzer.h"
00065 
00066 #include "FWCore/Framework/interface/Event.h"
00067 #include "FWCore/Framework/interface/MakerMacros.h"
00068 
00069 #include "FWCore/ParameterSet/interface/ParameterSet.h"
00070 
00071 #include "FWCore/ServiceRegistry/interface/Service.h"
00072 #include "FWCore/MessageLogger/interface/MessageLogger.h"
00073 
00074 // DQM
00075 #include "DQMServices/Core/interface/DQMStore.h"
00076 #include "DQMServices/Core/interface/MonitorElement.h"
00077 
00078 
00079 // Trigger Headers
00080 
00081 
00082 
00083 //
00084 // class declaration
00085 //
00086 
00087 class L1TdeRCT : public edm::EDAnalyzer {
00088 
00089 public:
00090 
00091 // Constructor
00092   L1TdeRCT(const edm::ParameterSet& ps);
00093 
00094 // Destructor
00095  virtual ~L1TdeRCT();
00096 
00097 protected:
00098 // Analyze
00099  void analyze(const edm::Event& e, const edm::EventSetup& c);
00100 
00101 // BeginJob
00102  void beginJob(const edm::EventSetup& c);
00103 
00104 // EndJob
00105 void endJob(void);
00106 
00107 private:
00108   // ----------member data ---------------------------
00109   DQMStore * dbe;
00110 
00111   // begin region information
00112   MonitorElement *rctRegDataOcc1D_;
00113   MonitorElement *rctRegEmulOcc1D_;
00114   MonitorElement *rctRegMatchedOcc1D_;
00115   MonitorElement *rctRegUnmatchedDataOcc1D_;
00116   MonitorElement *rctRegUnmatchedEmulOcc1D_;
00117 
00118   MonitorElement *rctRegEff1D_;
00119   MonitorElement *rctRegIneff1D_;
00120   MonitorElement *rctRegOvereff1D_;
00121 
00122   MonitorElement *rctRegDataOcc2D_;
00123   MonitorElement *rctRegEmulOcc2D_;
00124   MonitorElement *rctRegMatchedOcc2D_;
00125   MonitorElement *rctRegUnmatchedDataOcc2D_;
00126   MonitorElement *rctRegUnmatchedEmulOcc2D_;
00127   MonitorElement *rctRegDeltaEt2D_;
00128   MonitorElement *rctRegDeltaEtOcc2D_;
00129 
00130   MonitorElement *rctRegEff2D_;
00131   MonitorElement *rctRegIneff2D_;
00132   MonitorElement *rctRegOvereff2D_;
00133   MonitorElement *rctRegSpEff2D_;
00134 
00135   // end region information
00136 
00137   // begin bit information
00138   MonitorElement *rctBitEmulOverFlow2D_;
00139   MonitorElement *rctBitDataOverFlow2D_;
00140   MonitorElement *rctBitMatchedOverFlow2D_;
00141   MonitorElement *rctBitUnmatchedEmulOverFlow2D_;
00142   MonitorElement *rctBitUnmatchedDataOverFlow2D_;
00143   MonitorElement *rctBitOverFlowEff2D_;
00144   MonitorElement *rctBitOverFlowIneff2D_;
00145   MonitorElement *rctBitOverFlowOvereff2D_;
00146   MonitorElement *rctBitEmulTauVeto2D_;
00147   MonitorElement *rctBitDataTauVeto2D_;
00148   MonitorElement *rctBitMatchedTauVeto2D_;
00149   MonitorElement *rctBitUnmatchedEmulTauVeto2D_;
00150   MonitorElement *rctBitUnmatchedDataTauVeto2D_;
00151   MonitorElement *rctBitTauVetoEff2D_;
00152   MonitorElement *rctBitTauVetoIneff2D_;
00153   MonitorElement *rctBitTauVetoOvereff2D_;
00154   MonitorElement *rctBitEmulMip2D_;
00155   MonitorElement *rctBitDataMip2D_;
00156   MonitorElement *rctBitMatchedMip2D_;
00157   MonitorElement *rctBitUnmatchedEmulMip2D_;
00158   MonitorElement *rctBitUnmatchedDataMip2D_;
00159   MonitorElement *rctBitMipEff2D_;
00160   MonitorElement *rctBitMipIneff2D_;
00161   MonitorElement *rctBitMipOvereff2D_;
00162   MonitorElement *rctBitEmulQuiet2D_;
00163   MonitorElement *rctBitDataQuiet2D_;
00164   MonitorElement *rctBitMatchedQuiet2D_;
00165   MonitorElement *rctBitUnmatchedEmulQuiet2D_;
00166   MonitorElement *rctBitUnmatchedDataQuiet2D_;
00167   MonitorElement *rctBitQuietEff2D_;
00168   MonitorElement *rctBitQuietIneff2D_;
00169   MonitorElement *rctBitQuietOvereff2D_;
00170   MonitorElement *rctBitEmulHfPlusTau2D_;
00171   MonitorElement *rctBitDataHfPlusTau2D_;
00172   MonitorElement *rctBitMatchedHfPlusTau2D_;
00173   MonitorElement *rctBitUnmatchedEmulHfPlusTau2D_;
00174   MonitorElement *rctBitUnmatchedDataHfPlusTau2D_;
00175   MonitorElement *rctBitHfPlusTauEff2D_;
00176   MonitorElement *rctBitHfPlusTauIneff2D_;
00177   MonitorElement *rctBitHfPlusTauOvereff2D_;
00178 
00179   // end bit information
00180 
00181   MonitorElement* rctInputTPGEcalOcc_ ;
00182   MonitorElement* rctInputTPGHcalOcc_ ;
00183   MonitorElement* rctInputTPGHcalSample_ ;
00184 
00185   MonitorElement* rctIsoEmDataOcc_ ;
00186   MonitorElement* rctIsoEmEmulOcc_ ;
00187   MonitorElement* rctIsoEmEff1Occ_ ;
00188   MonitorElement* rctIsoEmEff2Occ_ ;
00189   MonitorElement* rctIsoEmIneffOcc_ ;
00190   MonitorElement* rctIsoEmOvereffOcc_ ; 
00191   MonitorElement* rctIsoEmEff1_ ;
00192   MonitorElement* rctIsoEmEff2_ ;
00193   MonitorElement* rctIsoEmIneff_ ;
00194   MonitorElement* rctIsoEmOvereff_ ;
00195 
00196   MonitorElement* rctIsoEmDataOcc1D_ ;
00197   MonitorElement* rctIsoEmEmulOcc1D_ ;
00198   MonitorElement* rctIsoEmEff1Occ1D_ ;
00199   MonitorElement* rctIsoEmEff2Occ1D_ ;
00200   MonitorElement* rctIsoEmIneffOcc1D_ ;
00201   MonitorElement* rctIsoEmOvereffOcc1D_ ; 
00202   MonitorElement* rctIsoEmEff1oneD_ ;
00203   MonitorElement* rctIsoEmEff2oneD_ ;
00204   MonitorElement* rctIsoEmIneff1D_ ;
00205   MonitorElement* rctIsoEmOvereff1D_ ;
00206 
00207   MonitorElement* rctNisoEmDataOcc_ ;
00208   MonitorElement* rctNisoEmEmulOcc_ ;
00209   MonitorElement* rctNisoEmEff1Occ_ ;
00210   MonitorElement* rctNisoEmEff2Occ_ ;
00211   MonitorElement* rctNisoEmIneffOcc_ ;
00212   MonitorElement* rctNisoEmOvereffOcc_ ;
00213   MonitorElement* rctNisoEmEff1_ ;
00214   MonitorElement* rctNisoEmEff2_ ;
00215   MonitorElement* rctNisoEmIneff_ ;
00216   MonitorElement* rctNisoEmOvereff_ ;
00217 
00218   MonitorElement* rctNisoEmDataOcc1D_ ;
00219   MonitorElement* rctNisoEmEmulOcc1D_ ;
00220   MonitorElement* rctNisoEmEff1Occ1D_ ;
00221   MonitorElement* rctNisoEmEff2Occ1D_ ;
00222   MonitorElement* rctNisoEmIneffOcc1D_ ;
00223   MonitorElement* rctNisoEmOvereffOcc1D_ ;
00224   MonitorElement* rctNisoEmEff1oneD_ ;
00225   MonitorElement* rctNisoEmEff2oneD_ ;
00226   MonitorElement* rctNisoEmIneff1D_ ;
00227   MonitorElement* rctNisoEmOvereff1D_ ;
00228 
00229   MonitorElement*  rctIsoEffChannel_[396] ;
00230   MonitorElement*  rctIsoIneffChannel_[396] ;
00231   MonitorElement*  rctIsoOvereffChannel_[396] ;
00232 
00233   MonitorElement*  rctNisoEffChannel_[396] ;
00234   MonitorElement*  rctNisoIneffChannel_[396] ;
00235   MonitorElement*  rctNisoOvereffChannel_[396] ;
00236 
00237   // begin region channel information
00238   MonitorElement* rctRegEffChannel_[396];
00239   MonitorElement* rctRegIneffChannel_[396];
00240   MonitorElement* rctRegOvereffChannel_[396];
00241   
00242   // end region channel information
00243 
00244   int nev_; // Number of events processed
00245   std::string outputFile_; //file name for ROOT ouput
00246   std::string histFolder_; // base dqm folder
00247   bool verbose_;
00248   bool singlechannelhistos_;
00249   bool monitorDaemon_;
00250   ofstream logFile_;
00251 
00252   edm::InputTag rctSourceEmul_;
00253   edm::InputTag rctSourceData_;
00254   edm::InputTag ecalTPGData_;
00255   edm::InputTag hcalTPGData_;
00256 
00257 
00258 protected:
00259 
00260 void DivideME1D(MonitorElement* numerator, MonitorElement* denominator, MonitorElement* result) ;
00261 void DivideME2D(MonitorElement* numerator, MonitorElement* denominator, MonitorElement* result) ;
00262 
00263 };
00264 
00265 #endif

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