CMSSW Reference Manual

FineDelayHistosUsingDb::FineDelayHistosUsingDb	(	DQMOldReceiver *	mui,
		SiStripConfigDb * const	db
	)

Definition at line 24 of file FineDelayHistosUsingDb.cc.

References delays_, LogTrace, and sistrip::mlDqmClient_.

00026   : CommissioningHistosUsingDb( db ),
00027     SamplingHistograms( mui, FINE_DELAY ),
00028     tracker_(0)
00029 {
00030   LogTrace(mlDqmClient_) 
00031     << "[FineDelayHistosUsingDb::" << __func__ << "]"
00032     << " Constructing object...";
00033   delays_.clear();
00034 }

FineDelayHistosUsingDb::FineDelayHistosUsingDb	(	DQMStore *	bei,
		SiStripConfigDb * const	db
	)

Definition at line 38 of file FineDelayHistosUsingDb.cc.

References delays_, LogTrace, and sistrip::mlDqmClient_.

00040   : CommissioningHistosUsingDb( db ),
00041     SamplingHistograms( bei, FINE_DELAY ),
00042     tracker_(0)
00043 {
00044   LogTrace(mlDqmClient_) 
00045     << "[FineDelayHistosUsingDb::" << __func__ << "]"
00046     << " Constructing object...";
00047   delays_.clear();
00048 }

FineDelayHistosUsingDb::~FineDelayHistosUsingDb ( ) [virtual]

Definition at line 52 of file FineDelayHistosUsingDb.cc.

References LogTrace, and sistrip::mlDqmClient_.

00052                                                 {
00053   LogTrace(mlDqmClient_) 
00054     << "[FineDelayHistosUsingDb::" << __func__ << "]"
00055     << " Destructing object...";
00056 }

void FineDelayHistosUsingDb::computeDelays ( ) [private]

Definition at line 132 of file FineDelayHistosUsingDb.cc.

References c, CommissioningHistosUsingDb::cabling(), SiStripFedCabling::connections(), CommissioningHistograms::data(), delays_, dist(), SiStripFedCabling::feds(), TrackerGeometry::idToDetUnit(), int, iter, getDQMSummary::key, PV3DBase< T, PVType, FrameType >::mag(), sistrip::mlDqmClient_, size, GeomDet::toLocal(), DetId::Tracker, tracker_, x, y, and z.

Referenced by update().

00132                                            {
00133   // do nothing if delays_ map is already filled
00134   if(delays_.size()>0) return;
00135 
00136   // the point from which track should originate
00137   float x = 0.;
00138   float y = 0.;
00139   float z = 0.;
00140   GlobalPoint referenceP_ = GlobalPoint(x,y,z);
00141   const double c = 30; // cm/ns
00142   
00143   // the reference parameters (best delay in ns, initial Latency)
00144   float bestDelay_ = 0.;
00145   if(data().size()) {
00146     Analyses::const_iterator iter = data().begin();
00147     bestDelay_ = dynamic_cast<SamplingAnalysis*>(iter->second)->maximum();
00148   }
00149 
00150   // Retrieve FED ids from cabling
00151   std::vector<uint16_t> ids = cabling()->feds() ;
00152   
00153   // loop over the FED ids
00154   for (std::vector<uint16_t>::const_iterator ifed = ids.begin(); ifed != ids.end(); ++ifed) {
00155     const std::vector<FedChannelConnection>& conns = cabling()->connections(*ifed);
00156     // loop over the connections for that FED 
00157     for ( std::vector<FedChannelConnection>::const_iterator iconn = conns.begin(); iconn != conns.end(); iconn++ ) {
00158       // check that this is a tracker module
00159       if(DetId(iconn->detId()).det()!=DetId::Tracker) continue;
00160       // retrieve the position of that module in the tracker using the geometry
00161       // and use it to compute the distance to the reference point set in the configuration
00162       if(tracker_) {
00163         float dist = tracker_->idToDetUnit(DetId(iconn->detId()))->toLocal(referenceP_).mag(); 
00164         float tof  = dist/c ;
00165         // compute the PLL delay shift for the module as delay + tof 
00166         int delay = int(round(bestDelay_+tof));
00167         // store that in the map
00168         delays_[SiStripFecKey( iconn->fecCrate(),
00169                                iconn->fecSlot(),
00170                                iconn->fecRing(),
00171                                iconn->ccuAddr(),
00172                                iconn->ccuChan(), 0 ).key()] = delay;
00173       } else {
00174         edm::LogError(mlDqmClient_)
00175           << "[FineDelayHistosUsingDb::" << __func__ << "]"
00176           << " Tracker geometry not initialized. Impossible to compute the delays.";
00177       }
00178     }
00179   }
00180 }

void FineDelayHistosUsingDb::configure	(	const edm::ParameterSet &	pset,
		const edm::EventSetup &	setup
	)			`[virtual]`

Reimplemented from SamplingHistograms.

Definition at line 60 of file FineDelayHistosUsingDb.cc.

References SamplingHistograms::configure(), edm::EventSetup::get(), and tracker_.

00061                                                                      {
00062   // get geometry
00063   edm::ESHandle<TrackerGeometry> estracker;
00064   setup.get<TrackerDigiGeometryRecord>().get(estracker);
00065   tracker_=&(* estracker);
00066   SamplingHistograms::configure(pset,setup);
00067 }

void FineDelayHistosUsingDb::create	(	SiStripConfigDb::AnalysisDescriptionsV &	desc,
		Analysis	analysis
	)			`[private, virtual]`

Reimplemented from CommissioningHistosUsingDb.

Definition at line 346 of file FineDelayHistosUsingDb.cc.

References CommissioningHistosUsingDb::db(), SiStripConfigDb::dbParams(), SamplingAnalysis::error(), HLT_VtxMuL3::errors, CommissioningAnalysis::fecKey(), CommissioningAnalysis::fedKey(), CommissioningAnalysis::getErrorCodes(), CommissioningAnalysis::isValid(), SamplingAnalysis::maximum(), SiStripDbParams::partitions(), and tmp.

00347                                                          {
00348 
00349 #ifdef USING_NEW_DATABASE_MODEL
00350 
00351   SamplingAnalysis* anal = dynamic_cast<SamplingAnalysis*>( analysis->second );
00352   if ( !anal ) { return; }
00353   
00354   SiStripFecKey fec_key( anal->fecKey() ); //@@ analysis->first
00355   SiStripFedKey fed_key( anal->fedKey() );
00356 
00357   FineDelayAnalysisDescription* tmp;
00358   tmp = new FineDelayAnalysisDescription( anal->maximum(),
00359                                           anal->error(),
00360                                           0,
00361                                           0,
00362                                           0,
00363                                           0,
00364                                           0,
00365                                           0, 
00366                                           db()->dbParams().partitions().begin()->second.partitionName(),
00367                                           db()->dbParams().partitions().begin()->second.runNumber(),
00368                                           anal->isValid(),
00369                                           "",
00370                                           fed_key.fedId(),
00371                                           fed_key.feUnit(),
00372                                           fed_key.feChan(),
00373                                           fed_key.fedApv() );
00374     
00375   // Add comments
00376   typedef std::vector<std::string> Strings;
00377   Strings errors = anal->getErrorCodes();
00378   Strings::const_iterator istr = errors.begin();
00379   Strings::const_iterator jstr = errors.end();
00380   for ( ; istr != jstr; ++istr ) { tmp->addComments( *istr ); }
00381     
00382   // Store description
00383   desc.push_back( tmp );
00384     
00385 #endif
00386   
00387 }

void FineDelayHistosUsingDb::update ( SiStripConfigDb::FedDescriptionsRange feds ) [private]

Definition at line 288 of file FineDelayHistosUsingDb.cc.

References CommissioningHistosUsingDb::cabling(), computeDelays(), SiStripFedCabling::connections(), delays_, lat::endl(), SiStripFedCabling::feds(), find(), int, getDQMSummary::key, LogTrace, sistrip::mlDqmClient_, ss, and DetId::Tracker.

00288                                                                               {
00289 
00290   // do the core computation of delays per FED connection
00291   computeDelays();
00292 
00293   // Retrieve FED ids from cabling
00294   std::vector<uint16_t> ids = cabling()->feds() ;
00295   
00296   // loop over the FED ids
00297   for ( SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin(); ifed != feds.end(); ifed++ ) {
00298     // If FED id not found in list (from cabling), then continue
00299     if ( find( ids.begin(), ids.end(), (*ifed)->getFedId() ) == ids.end() ) { continue; }
00300     const std::vector<FedChannelConnection>& conns = cabling()->connections((*ifed)->getFedId());
00301     // loop over the connections for that FED 
00302     for ( std::vector<FedChannelConnection>::const_iterator iconn = conns.begin(); iconn != conns.end(); iconn++ ) {
00303       // check that this is a tracker module
00304       if(DetId(iconn->detId()).det()!=DetId::Tracker) continue;
00305       // build the Fed9UAddress for that channel. Used to update the description.
00306       Fed9U::Fed9UAddress fedChannel = Fed9U::Fed9UAddress(iconn->fedCh()); 
00307       // retreive the current value for the delays
00308       int fedDelayCoarse = (*ifed)->getCoarseDelay(fedChannel);
00309       int fedDelayFine = (*ifed)->getFineDelay(fedChannel);
00310       int fedDelay = int(fedDelayCoarse*25. - fedDelayFine*24./25.);
00311       // extract the delay from the map
00312       int delay = delays_[SiStripFecKey( iconn->fecCrate(),
00313                                          iconn->fecSlot(),
00314                                          iconn->fecRing(),
00315                                          iconn->ccuAddr(),
00316                                          iconn->ccuChan(), 0 ).key()];
00317       // compute the FED delay
00318       // this is done by substracting the best (PLL) delay to the present value (from the db)
00319       fedDelay -= delay;
00320       fedDelayCoarse = (fedDelay/25)+1;
00321       fedDelayFine = fedDelayCoarse*25-fedDelay;
00322       if(fedDelayFine==25) { fedDelayFine = 0; --fedDelayCoarse; }
00323       // update the FED delay
00324       std::stringstream ss;
00325       ss << "[FineDelayHistosUsingDb::" << __func__ << "]"
00326          << " Updating the FED delay"
00327          << " for loop FED id/ch "
00328          << (*ifed)->getFedId() << "/" << iconn->fedCh()
00329          << " from "
00330          << (*ifed)->getCoarseDelay( fedChannel) << "/" << (*ifed)->getFineDelay( fedChannel)
00331          << " to ";
00332       (*ifed)->setDelay(fedChannel, fedDelayCoarse, fedDelayFine);
00333       ss << (*ifed)->getCoarseDelay(fedChannel) << "/" << (*ifed)->getFineDelay( fedChannel) << std::endl;
00334       LogTrace(mlDqmClient_) << ss.str();
00335     }
00336   }
00337 
00338   edm::LogVerbatim(mlDqmClient_)
00339     << "[FineDelayHistosUsingDb::" << __func__ << "]"
00340     << " Updated FED delay for " << ids.size() << " FEDs!";
00341 
00342 }

bool FineDelayHistosUsingDb::update ( SiStripConfigDb::DeviceDescriptionsRange devices ) [private]

Definition at line 184 of file FineDelayHistosUsingDb.cc.

References addr, SiStripFecKey::ccuAddr(), SiStripConfigDb::DeviceAddress::ccuAddr_, SiStripFecKey::ccuChan(), SiStripConfigDb::DeviceAddress::ccuChan_, computeDelays(), CommissioningHistosUsingDb::db(), delays_, SiStripConfigDb::deviceAddress(), SiStripFecKey::fecCrate(), SiStripConfigDb::DeviceAddress::fecCrate_, SiStripFecKey::fecRing(), SiStripConfigDb::DeviceAddress::fecRing_, SiStripFecKey::fecSlot(), SiStripConfigDb::DeviceAddress::fecSlot_, int, reco::method::invalid, sistrip::invalid_, LogTrace, sistrip::mlDqmClient_, and ss.

Referenced by uploadConfigurations().

00184                                                                                     {
00185 
00186   // do the core computation of delays per FED connection
00187   computeDelays();
00188 
00189   // Iterate through devices and update device descriptions
00190   uint16_t updated = 0;
00191   std::vector<SiStripFecKey> invalid;
00192   SiStripConfigDb::DeviceDescriptionsV::const_iterator idevice;
00193   for ( idevice = devices.begin(); idevice != devices.end(); idevice++ ) {
00194     
00195     // Check device type
00196     if ( (*idevice)->getDeviceType() != PLL ) { continue; }
00197     
00198     // Cast to retrieve appropriate description object
00199     pllDescription* desc = dynamic_cast<pllDescription*>( *idevice ); 
00200     if ( !desc ) { continue; }
00201     
00202     // Retrieve device addresses from device description
00203     const SiStripConfigDb::DeviceAddress& addr = db()->deviceAddress(*desc);
00204 
00205     // Construct key from device description
00206     uint32_t fec_key = SiStripFecKey( addr.fecCrate_,
00207                                       addr.fecSlot_, 
00208                                       addr.fecRing_,
00209                                       addr.ccuAddr_, 
00210                                       addr.ccuChan_,
00211                                       0 ).key();
00212     SiStripFecKey fec_path = SiStripFecKey( fec_key );
00213     
00214     // extract the delay from the map
00215     int delay = delays_[fec_key];
00216     int delayCoarse = delay/25;
00217     int delayFine   = int(round((delay-25*delayCoarse)*24./25.));
00218     if(delayFine==24) { delayFine=0; ++delayCoarse; }
00219     //  maximum coarse setting
00220     if ( delayCoarse > 15 ) { invalid.push_back(fec_key); delayCoarse = sistrip::invalid_; }
00221                     
00222     // Update PLL settings
00223     if ( delayCoarse != sistrip::invalid_ && 
00224          delayFine != sistrip::invalid_ ) { 
00225       
00226       std::stringstream ss;
00227       ss << "[FineDelayHistosUsingDb::" << __func__ << "]"
00228          << " Updating coarse/fine PLL settings"
00229          << " for Crate/FEC/slot/ring/CCU "
00230          << fec_path.fecCrate() << "/"
00231          << fec_path.fecSlot() << "/"
00232          << fec_path.fecRing() << "/"
00233          << fec_path.ccuAddr() << "/"
00234          << fec_path.ccuChan() 
00235          << " from "
00236          << static_cast<uint16_t>( desc->getDelayCoarse() ) << "/" 
00237          << static_cast<uint16_t>( desc->getDelayFine() );
00238       desc->setDelayCoarse(delayCoarse);
00239       desc->setDelayFine(delayFine);
00240       updated++;
00241       ss << " to "
00242          << static_cast<uint16_t>( desc->getDelayCoarse() ) << "/" 
00243          << static_cast<uint16_t>( desc->getDelayFine() );
00244       LogTrace(mlDqmClient_) << ss.str();
00245 
00246     } else {
00247       LogTrace(mlDqmClient_) 
00248         << "[FineDelayHistosUsingDb::" << __func__ << "]"
00249         << " Unexpected PLL delay settings for Crate/FEC/slot/ring/CCU " 
00250         << fec_path.fecCrate() << "/"
00251         << fec_path.fecSlot() << "/"
00252         << fec_path.fecRing() << "/"
00253         << fec_path.ccuAddr() << "/"
00254         << fec_path.ccuChan();
00255     }
00256 
00257   }
00258 
00259   // Check if invalid settings were found
00260   if ( !invalid.empty() ) {
00261     std::stringstream ss;
00262     ss << "[FineDelayHistosUsingDb::" << __func__ << "]"
00263        << " Found PLL coarse setting of 15" 
00264        << " (not allowed!) for following channels"
00265        << " (Crate/FEC/slot/ring/CCU/LLD): ";
00266     std::vector<SiStripFecKey>::iterator ikey = invalid.begin();
00267     std::vector<SiStripFecKey>::iterator jkey = invalid.end();
00268     for ( ; ikey != jkey; ++ikey ) {
00269       ss << ikey->fecCrate() << "/"
00270          << ikey->fecSlot() << "/"
00271          << ikey->fecRing() << "/"
00272          << ikey->ccuAddr() << "/"
00273          << ikey->ccuChan() << ", ";
00274     }
00275     edm::LogWarning(mlDqmClient_) << ss.str();
00276     return false;
00277   }
00278   
00279   edm::LogVerbatim(mlDqmClient_) 
00280     << "[FineDelayHistosUsingDb::" << __func__ << "]"
00281     << " Updated PLL settings for " 
00282     << updated << " modules";
00283   return true;
00284 }

void FineDelayHistosUsingDb::uploadConfigurations ( ) [virtual]

Reimplemented from CommissioningHistosUsingDb.

Definition at line 71 of file FineDelayHistosUsingDb.cc.

References SiStripConfigDb::clearDeviceDescriptions(), SiStripConfigDb::clearFedDescriptions(), CommissioningHistosUsingDb::db(), CommissioningHistosUsingDb::doUploadConf(), SiStripConfigDb::getDeviceDescriptions(), SiStripConfigDb::getFedDescriptions(), LogTrace, sistrip::mlDqmClient_, update(), SiStripConfigDb::uploadDeviceDescriptions(), and SiStripConfigDb::uploadFedDescriptions().

00071                                                   {
00072   
00073   if ( !db() ) {
00074     edm::LogWarning(mlDqmClient_) 
00075       << "[FineDelayHistosUsingDb::" << __func__ << "]"
00076       << " NULL pointer to SiStripConfigDb interface!"
00077       << " Aborting upload...";
00078     return;
00079   }
00080   
00081   // Retrieve and update PLL device descriptions
00082   db()->clearDeviceDescriptions(); 
00083   SiStripConfigDb::DeviceDescriptionsRange devices = db()->getDeviceDescriptions( PLL ); 
00084   bool upload = update( devices );
00085     
00086   // Check if new PLL settings are valid 
00087   if ( !upload ) {
00088     edm::LogWarning(mlDqmClient_) 
00089       << "[FineDelayHistosUsingDb::" << __func__ << "]"
00090       << " Found invalid PLL settings (coarse > 15)"
00091       << " Aborting update to database...";
00092     return;
00093   }
00094     
00095   // Upload PLL device descriptions
00096   if ( doUploadConf() ) { 
00097     LogTrace(mlDqmClient_) 
00098       << "[FineDelayHistosUsingDb::" << __func__ << "]"
00099       << " Uploading PLL settings to DB...";
00100     db()->uploadDeviceDescriptions(); 
00101     LogTrace(mlDqmClient_) 
00102       << "[FineDelayHistosUsingDb::" << __func__ << "]"
00103       << " Upload of PLL settings to DB finished!";
00104   } else {
00105     edm::LogWarning(mlDqmClient_) 
00106       << "[FineDelayHistosUsingDb::" << __func__ << "]"
00107       << " TEST only! No PLL settings will be uploaded to DB...";
00108   }
00109 
00110   // Update FED descriptions with new ticker thresholds
00111   db()->clearFedDescriptions(); 
00112   SiStripConfigDb::FedDescriptionsRange feds = db()->getFedDescriptions(); 
00113   update( feds );
00114     
00115   // Update FED descriptions with new ticker thresholds
00116   if ( doUploadConf() ) { 
00117     LogTrace(mlDqmClient_) 
00118       << "[FineDelayHistosUsingDb::" << __func__ << "]"
00119       << " Uploading FED ticker thresholds to DB...";
00120     db()->uploadFedDescriptions(); 
00121     LogTrace(mlDqmClient_) 
00122       << "[FineDelayHistosUsingDb::" << __func__ << "]"
00123       << " Upload of FED ticker thresholds to DB finished!";
00124   } else {
00125     edm::LogWarning(mlDqmClient_) 
00126       << "[FineDelayHistosUsingDb::" << __func__ << "]"
00127       << " TEST only! No FED ticker thresholds will be uploaded to DB...";
00128   }
00129 
00130 }

std::map<unsigned int,unsigned int > FineDelayHistosUsingDb::delays_ [private]

Definition at line 42 of file FineDelayHistosUsingDb.h.

Referenced by computeDelays(), FineDelayHistosUsingDb(), and update().

const TrackerGeometry* FineDelayHistosUsingDb::tracker_ [private]

Definition at line 44 of file FineDelayHistosUsingDb.h.

Referenced by computeDelays(), and configure().


Public Member Functions
virtual void	configure (const edm::ParameterSet &, const edm::EventSetup &)
	FineDelayHistosUsingDb (DQMStore , SiStripConfigDb const )
	FineDelayHistosUsingDb (DQMOldReceiver , SiStripConfigDb const )
virtual void	uploadConfigurations ()
virtual	~FineDelayHistosUsingDb ()
Private Member Functions
void	computeDelays ()
void	create (SiStripConfigDb::AnalysisDescriptionsV &, Analysis)
void	update (SiStripConfigDb::FedDescriptionsRange)
bool	update (SiStripConfigDb::DeviceDescriptionsRange)
Private Attributes
std::map< unsigned int, unsigned int >	delays_
const TrackerGeometry *	tracker_

FineDelayHistosUsingDb Class Reference

Public Member Functions

Private Member Functions

Private Attributes

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation

Member Data Documentation