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FedCablingSummaryFactory.h
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1 #ifndef DQM_SiStripCommissioningSummary_FedCablingSummaryFactory_H
2 #define DQM_SiStripCommissioningSummary_FedCablingSummaryFactory_H
3 
7 
8 template <>
10 public:
11  uint32_t init(const sistrip::Monitorable&,
12  const sistrip::Presentation&,
13  const sistrip::View&,
14  const std::string& top_level_dir,
15  const sistrip::Granularity&,
16  const std::map<uint32_t, FedCablingAnalysis*>& data);
17 
18  void fill(TH1& summary_histo);
19 };
20 
21 #endif // DQM_SiStripCommissioningSummary_FedCablingSummaryFactory_H
Histogram-based analysis for connection loop.
int init
Definition: HydjetWrapper.h:66
char data[epos_bytes_allocation]
Definition: EPOS_Wrapper.h:80