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26 const std::map<
const VarBase*, std::set<std::string> >*
const previous_cut_strings)
const {
32 if (!previous_cut_strings || (previous_cut_strings && !previous_cut_strings->count(
cut_var_))) {
42 const std::map<
const VarBase*, std::set<std::string> >*
const previous_cut_strings)
const {
56 if (!previous_cut_strings || (previous_cut_strings && !previous_cut_strings->count(
this))) {
57 if (!cut_strings.count(
this))
59 cut_strings.at(
this).insert(
name +
" > " +
itos(lower_cut) +
" && " +
name +
" < " +
itos(upper_cut));
78 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n";
79 fs <<
"const ap_int<" <<
nbits_ <<
"> " <<
name_ <<
" = " << n1 <<
shift <<
";\n";
92 o1 =
"(" +
o1 +
"+1)>>1";
98 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n";
99 fs <<
"const ap_int<" <<
nbits_ <<
"> " <<
name_ <<
" = " <<
o1 <<
";\n";
107 fs <<
"// units " <<
kstring() <<
"\t" <<
K_ <<
"\n";
108 fs <<
"const ap_int<" <<
nbits_ <<
"> " <<
name_ <<
" = " <<
name_ <<
"_wire;\n";
116 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n";
117 fs <<
"static const ap_int<" <<
nbits_ <<
"> " <<
name_ <<
" = " <<
ival_ <<
";\n";
140 o1 =
o1 +
" + " + o2;
144 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n" <<
t;
167 o1 =
o1 +
" - " + o2;
171 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n" <<
t;
184 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n" <<
t;
197 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n" <<
t;
208 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n" <<
t <<
";\n";
219 o1 =
"(" +
o1 +
"+1)>>1";
226 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n" <<
t <<
";\n";
242 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n" <<
t <<
";\n";
257 fs <<
"// " <<
nbits_ <<
" bits \t " <<
kstring() <<
"\t" <<
K_ <<
"\n" <<
t;
267 fs <<
"#include \"LUT_" <<
name_ <<
".h\"\n";
278 fs <<
t <<
"; // address for the LUT\n";
289 fs <<
"const ap_int<1> " <<
name_ <<
" = (";
290 std::map<const VarBase*, std::set<std::string> > cut_strings0, cut_strings1;
292 if (
cut->op() !=
"cut")
298 if (
cut->op() !=
"cut")
299 cut->print_cuts(cut_strings1,
step_,
hls, &cut_strings0);
301 if (
cut->cut_var()->p1())
302 cut->cut_var()->p1()->print_cuts(cut_strings1,
step_,
hls, &cut_strings1);
303 if (
cut->cut_var()->p2())
304 cut->cut_var()->p2()->print_cuts(cut_strings1,
step_,
hls, &cut_strings1);
305 if (
cut->cut_var()->p3())
306 cut->cut_var()->p3()->print_cuts(cut_strings1,
step_,
hls, &cut_strings1);
311 for (
const auto&
cut_var : cut_strings0) {
313 for (
const auto& cut_string :
cut_var.second) {
319 for (
const auto&
cut_var : cut_strings1) {
321 for (
const auto& cut_string :
cut_var.second) {
350 fs <<
"//\n// STEP " <<
i <<
"\n\n";
359 std::vector<VarBase*>
vd;
362 for (
int i = 0;
i < imax; ++
i)
366 fs <<
"#include \"ap_int.h\"\n\n";
367 fs <<
"void XXX (\n";
370 for (
int i = 0;
i < imax; ++
i)
371 fs <<
" const ap_int<" << (
vd[
i])->nbits() <<
"> " << (
vd[
i])->
name() <<
"_wire,\n";
375 for (
int i = 0;
i < imax; ++
i)
376 fs <<
" ap_int<" << (
v[
i])->nbits() <<
"> * const " << (
v[
i])->
name() <<
"_wire,\n";
378 fs <<
" ap_int<" << (
v[imax])->
nbits() <<
"> * const " << (
v[imax])->
name() <<
"_wire\n";
380 fs <<
"#pragma HLS pipeline II=1\n";
381 fs <<
"#pragma HLS latency max=25\n";
385 for (
int i = 0;
i < imax; ++
i) {
387 fs <<
"// calculating " << (
v[
i])->
name() <<
"\n";
396 fs <<
"// wiring the outputs \n";
398 for (
int i = 0;
i < imax; ++
i) {
400 fs <<
"*" <<
n <<
" = " << (
v[
i])->
name() <<
";\n";
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print_cuts(std::map< const VarBase *, std::set< std::string > > &cut_strings, const int step, Verilog, const std::map< const VarBase *, std::set< std::string > > *const previous_cut_strings=nullptr) const
void writeLUT(std::ofstream &fs) const
void print_step(int step, std::ofstream &fs, Verilog)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print_all(std::ofstream &fs, Verilog)
std::string kstring() const
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
std::vector< DeviationSensor2D * > vd
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
static std::string itos(int i)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
virtual void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
static struct trklet::VarBase::HLS hls
static void design_print(const std::vector< VarBase * > &v, std::ofstream &fs, Verilog)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print_truncation(std::string &t, const std::string &o1, const int ps, Verilog) const
std::vector< VarBase * > cuts_
std::vector< unsigned short int > LUT
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print(std::map< const VarBase *, std::set< std::string > > &cut_strings, const int step, Verilog, const std::map< const VarBase *, std::set< std::string > > *const previous_cut_strings=nullptr) const
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override