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ecalDigiSequenceComplete_cff.py
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1 import FWCore.ParameterSet.Config as cms
2 
3 # unsuppressed digis simulation - full ES digitization
5 # ECAL Trigger Primitives (needed by SRP)
7 # Selective Readout Processor producer
9 # Preshower Zero suppression producer
11 # simEcalUnsuppressedDigis is now done inside mixing module
12 ecalDigiSequenceComplete = cms.Sequence(simEcalTriggerPrimitiveDigis*simEcalDigis*simEcalPreshowerDigis)
13 
14 
ecaldigi_cfi
ecalTriggerPrimitiveDigis_cff
ecalDigis_cff
ecalPreshowerDigis_cfi