15 <<
"+++ Upgrade CSCUpgradeCathodeLCTProcessor constructed while runPhase2_ is not set! +++\n";
31 <<
"+++ Upgrade CSCUpgradeCathodeLCTProcessor constructed while runPhase2_ is not set! +++\n";
45 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
46 <<
"....................PreTrigger, Phase2 version with localized dead time zone...........................";
53 bool pre_trig =
false;
57 for (
unsigned int bx_time = start_bx; bx_time <
fifo_tbins; bx_time++) {
63 std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer> > hits_in_patterns;
64 hits_in_patterns.clear();
70 if (
nhits[hstrip] > 0) {
71 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
72 <<
" bx = " << std::setw(2) << bx_time <<
" --->"
73 <<
" halfstrip = " << std::setw(3) << hstrip <<
" best pid = " << std::setw(2) <<
best_pid[hstrip]
74 <<
" nhits = " <<
nhits[hstrip];
90 1,
nhits[hstrip],
best_pid[hstrip], 1,
bend, halfstrip, cfeb, bx_time, nPreTriggers, 0));
96 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
97 <<
" halfstrip " << std::setw(3) << hstrip <<
" in dead zone and is pretriggerred";
107 int min_hstrip = hstrip - delta_hs;
108 int max_hstrip = hstrip + delta_hs;
113 for (
int hs = min_hstrip; hs <= max_hstrip; hs++)
114 busyMap[hs][bx_time + 1] =
true;
116 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
117 <<
" marked zone around pretriggerred halfstrip " << hstrip <<
" as dead zone for pretriggering at bx"
118 << bx_time + 1 <<
" halfstrip: [" << min_hstrip <<
"," << max_hstrip <<
"]";
134 LogTrace(
"CSCUpgradeCathodeLCTProcessor") <<
"no pretrigger, returning \n";
147 std::vector<CSCCLCTDigi> lctList;
150 const int maxHalfStrips = 2 *
numStrips + 1;
167 std::vector<CSCCLCTDigi> lctListBX;
181 while (start_bx < stop_bx) {
192 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
193 <<
"..... pretrigger at bx = " << first_bx <<
"; waiting drift delay .....";
198 std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer> > hits_in_patterns;
199 hits_in_patterns.clear();
205 if (
nhits[hstrip] > 0) {
206 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
207 <<
" bx = " << std::setw(2) << latch_bx <<
" --->"
208 <<
" halfstrip = " << std::setw(3) << hstrip <<
" best pid = " << std::setw(2) <<
best_pid[hstrip]
209 <<
" nhits = " <<
nhits[hstrip];
222 best_halfstrip[ilct] = -1;
223 best_quality[ilct] = 0;
234 pretrig_zone[hstrip] =
false;
243 for (
int hs = min_hs; hs <= max_hs; hs++)
244 pretrig_zone[hs] =
true;
246 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
247 <<
" marked pretrigger halfstrip zone [" << min_hs <<
"," << max_hs <<
"]";
257 if (
quality[hstrip] > best_quality[0] && pretrig_zone[hstrip] && !
busyMap[hstrip][first_bx])
260 best_halfstrip[0] = hstrip;
261 best_quality[0] =
quality[hstrip];
263 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
264 <<
" 1st CLCT: halfstrip = " << std::setw(3) << hstrip <<
" quality = " << std::setw(3)
265 <<
quality[hstrip] <<
" best halfstrip = " << std::setw(3) << best_halfstrip[0]
266 <<
" best quality = " << std::setw(3) << best_quality[0];
273 if (best_halfstrip[0] >= 0) {
278 if (
quality[hstrip] > best_quality[1] && pretrig_zone[hstrip] && !
busyMap[hstrip][first_bx])
281 best_halfstrip[1] = hstrip;
282 best_quality[1] =
quality[hstrip];
284 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
285 <<
" 2nd CLCT: halfstrip = " << std::setw(3) << hstrip <<
" quality = " << std::setw(3)
286 <<
quality[hstrip] <<
" best halfstrip = " << std::setw(3) << best_halfstrip[1]
287 <<
" best quality = " << std::setw(3) << best_quality[1];
295 int best_hs = best_halfstrip[ilct];
313 int halfstrip_in_cfeb = keystrip_data[ilct][
CLCT_STRIP] -
325 LogTrace(
"CSCCathodeLCTProcessor") <<
" Final selection: ilct " << ilct <<
" " << thisLCT << std::endl;
330 const auto& compHits = hits_in_patterns[best_hs][keystrip_data[ilct][
CLCT_PATTERN]];
344 lctList.push_back(thisLCT);
345 lctListBX.push_back(thisLCT);
353 start_bx = first_bx + 1;