Description

The SiStripZeroSuppression package implements the algorithms for the Digi ZeroSuppression. The currently implemented algorithm is the same used by FEDs fpga for the the ZeroSuppression.
The input collection is an edm::DetSetVector<SiStripRawDigis>, that contains the SiStripRawDigis extracted from a FED operating in Virgin or in Processed Mode. The output collection is an edm::DetSetVector<SiStripDigis>. The package performs pedestals subtraction (Virgin Mode), common mode noise subtraction (Virgin Mode) and zerosuppression (Virgin/Processed Mode). The package allows the access to the Conditional DB in order to read pedestals, noise and thresholds needed for the data handling.

Public interface

SiStripCommonModeNoiseSubtractor SiStripPedestalsService SiStripPedestalsSubtractor SiStripZeroSuppressionAlgorithm SiStripZeroSuppression SiStripZeroSuppressor

Modules

SiStripZeroSuppression

Unit tests and examples

Unknown

Status and planned development

Unknown

Last updated: @DATE@ Author: computer-generated.